lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Thu, 18 Feb 2016 17:18:49 +0100
From:	Matthias Brugger <matthias.bgg@...il.com>
To:	Sascha Hauer <s.hauer@...gutronix.de>, linux-pm@...r.kernel.org,
	Zhang Rui <rui.zhang@...el.com>,
	Eduardo Valentin <edubezval@...il.com>
Cc:	linux-kernel@...r.kernel.org, kernel@...gutronix.de,
	linux-mediatek@...ts.infradead.org,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 3/3] ARM64: dts: mt8173: Add thermal/auxadc device nodes

Hi Sascha,

On 30/11/15 12:42, Sascha Hauer wrote:
> This adds the thermal controller and auxadc nodes to the Mediatek MT8173
> dtsi file.
>
> Signed-off-by: Sascha Hauer <s.hauer@...gutronix.de>
> Reviewed-by: Daniel Kurtz <djkurtz@...omium.org>
> ---
>   arch/arm64/boot/dts/mediatek/mt8173.dtsi | 17 +++++++++++++++++
>   1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index 06a1564..e2ddd03 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -277,6 +277,11 @@
>   				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>   		};
>
> +		auxadc: auxadc@...01000 {
> +			compatible = "mediatek,mt8173-auxadc";

Can you please write a small Documentation about the binding.
I suppose it will be mediatek,auxadc and mediatek,mt8173-auxadc.

I can't do it my self, as my datasheet lacks the auxadc registers.

Thanks,
Matthias

> +			reg = <0 0x11001000 0 0x1000>;
> +		};
> +
>   		uart0: serial@...02000 {
>   			compatible = "mediatek,mt8173-uart",
>   				     "mediatek,mt6577-uart";
> @@ -487,6 +492,18 @@
>   			clock-names = "source", "hclk";
>   			status = "disabled";
>   		};
> +
> +		thermal: thermal@...0b000 {
> +			#thermal-sensor-cells = <0>;
> +			compatible = "mediatek,mt8173-thermal";
> +			reg = <0 0x1100b000 0 0x1000>;
> +			interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
> +			clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> +			clock-names = "therm", "auxadc";
> +			resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
> +			mediatek,auxadc = <&auxadc>;
> +			mediatek,apmixedsys = <&apmixedsys>;
> +		};
>   	};
>   };
>
>

Powered by blists - more mailing lists