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Message-ID: <1455974302-7082-1-git-send-email-anuragku@xilinx.com>
Date:	Sat, 20 Feb 2016 18:48:22 +0530
From:	Anurag Kumar Vulisha <anurag.kumar.vulisha@...inx.com>
To:	<robh+dt@...nel.org>, <pawel.moll@....com>, <mark.rutland@....com>,
	<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
	<tj@...nel.org>
CC:	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-ide@...r.kernel.org>, <anirudh@...inx.com>,
	<svemula@...inx.com>, <punnaia@...inx.com>,
	Anurag Kumar Vulisha <anuragku@...inx.com>
Subject: [RFC PATCH] drivers: ata: Read Rx water mark value from device-tree

This patch updates the driver to read the RX FIFO watermark value
from device tree. This read value is used by the driver for programming
FIFO RxWaterMark level, which sets the minimum number of free
locations within the RX FIFO.When the rx fifo level crosses the
programmed watermark level, sata controller will transmit HOLDS to
the device asking it to wait.

Signed-off-by: Anurag Kumar Vulisha <anuragku@...inx.com>
---
 .../devicetree/bindings/ata/ahci-ceva.txt          |    2 ++
 drivers/ata/ahci_ceva.c                            |   10 +++++++++-
 2 files changed, 11 insertions(+), 1 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ahci-ceva.txt b/Documentation/devicetree/bindings/ata/ahci-ceva.txt
index 7ca8b97..7e48dfc 100644
--- a/Documentation/devicetree/bindings/ata/ahci-ceva.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-ceva.txt
@@ -8,6 +8,7 @@ Required properties:
 
 Optional properties:
   - ceva,broken-gen2: limit to gen1 speed instead of gen2.
+  - ceva,rx-watermark: RX fifo water mark level for SATA controller.
 
 Examples:
 	ahci@...c0000 {
@@ -17,4 +18,5 @@ Examples:
 		interrupts = <0 133 4>;
 		clocks = <&clkc SATA_CLK_ID>;
 		ceva,broken-gen2;
+		ceva,rx-watermark = <0x40>;
 	};
diff --git a/drivers/ata/ahci_ceva.c b/drivers/ata/ahci_ceva.c
index 207649d..ea01f7d 100644
--- a/drivers/ata/ahci_ceva.c
+++ b/drivers/ata/ahci_ceva.c
@@ -88,6 +88,7 @@
 struct ceva_ahci_priv {
 	struct platform_device *ahci_pdev;
 	int flags;
+	u32 rx_watermark;
 };
 
 static struct ata_port_operations ahci_ceva_ops = {
@@ -147,7 +148,7 @@ static void ahci_ceva_setup(struct ahci_host_priv *hpriv)
 		writel(tmp, mmio + AHCI_VEND_PP5C);
 
 		/* Rx Watermark setting  */
-		tmp = PTC_RX_WM_VAL | PTC_RSVD;
+		tmp = cevapriv->rx_watermark | PTC_RSVD;
 		writel(tmp, mmio + AHCI_VEND_PTC);
 
 		/* Default to Gen 2 Speed and Gen 1 if Gen2 is broken */
@@ -187,6 +188,13 @@ static int ceva_ahci_probe(struct platform_device *pdev)
 	if (of_property_read_bool(np, "ceva,broken-gen2"))
 		cevapriv->flags = CEVA_FLAG_BROKEN_GEN2;
 
+	/* Read RX WATERMARK value from device tree */
+	if (of_property_read_u32(np, "ceva,rx-watermark",
+				&cevapriv->rx_watermark) < 0) {
+		/* using default RX water mark, if not in device tree */
+		cevapriv->rx_watermark = PTC_RX_WM_VAL;
+	}
+
 	hpriv->plat_data = cevapriv;
 
 	/* CEVA specific initialization */
-- 
1.7.1

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