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Message-Id: <1456308865-30876-1-git-send-email-ykk@rock-chips.com> Date: Wed, 24 Feb 2016 18:14:25 +0800 From: Yakir Yang <ykk@...k-chips.com> To: Michael Turquette <mturquette@...libre.com>, Heiko Stuebner <heiko@...ech.de>, Rob Herring <robh+dt@...nel.org> Cc: Stephen Boyd <sboyd@...eaurora.org>, Kumar Gala <galak@...eaurora.org>, Ian Campbell <ijc+devicetree@...lion.org.uk>, Pawel Moll <pawel.moll@....com>, Mark Rutland <mark.rutland@....com>, Jeffy Chen <jeffy.chen@...k-chips.com>, devicetree@...r.kernel.org, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org, linux-rockchip@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org, Yakir Yang <ykk@...k-chips.com> Subject: [PATCH v1 3/4] clk: rockchip: add the new clock ids for RK3228 HDMI Signed-off-by: Yakir Yang <ykk@...k-chips.com> --- include/dt-bindings/clock/rk3228-cru.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h index 5656bf6..fda9308 100644 --- a/include/dt-bindings/clock/rk3228-cru.h +++ b/include/dt-bindings/clock/rk3228-cru.h @@ -50,9 +50,11 @@ #define SCLK_SDIO_SAMPLE 119 #define SCLK_EMMC_SAMPLE 121 #define SCLK_VOP 122 +#define SCLK_HDMI_HDCP 123 /* dclk gates */ #define DCLK_VOP 190 +#define DCLK_HDMI_PHY 191 /* aclk gates */ #define ACLK_DMAC 194 @@ -76,6 +78,8 @@ #define PCLK_PWM 350 #define PCLK_TIMER 353 #define PCLK_PERI 363 +#define PCLK_HDMI_CTRL 364 +#define PCLK_HDMI_PHY 365 /* hclk gates */ #define HCLK_VOP 452 -- 1.9.1
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