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Message-ID: <CACRpkdbbOyp-=5n64QBhigtAebKV5BmFcnvFumjXv3f8bj8pbg@mail.gmail.com>
Date:	Thu, 25 Feb 2016 10:36:35 +0100
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Henry Paulissen <draakje197@...il.com>
Cc:	linux-sunxi <linux-sunxi@...glegroups.com>,
	Maxime Ripard <maxime.ripard@...e-electrons.com>,
	Chen-Yu Tsai <wens@...e.org>,
	Fabian Frederick <fabf@...net.be>,
	Maxime Coquelin <maxime.coquelin@...com>,
	Jean-Christophe PLAGNIOL-VILLARD <plagnioj@...osoft.com>,
	Hongzhou Yang <hongzhou.yang@...iatek.com>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5] Fix sun7i pin assignment for IRQ's

On Mon, Feb 22, 2016 at 9:20 AM, Henry Paulissen <draakje197@...il.com> wrote:

> After testing IRQ pins we found some bugs in the pinctrl declaration.
> Both PI* and PC* pins didn't work. PI* pins seemed to be connected
> to the wrong mux and PC* pins waren't working at all.
>
> Please note that the A20 soc manual is contradicting between version
> and even within the same document for both the PI and PC pins.
>
> Patch is based on testing with the hardware itself.
>
> Signed-off-by: Henry Paulissen <henry@...ronetworks.nl>
(...)
> Changes in v5:
>     Added a more detailed description.

Aha there is a v5. I took out the v4 and applied this
instead.

Yours,
Linus Walleij

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