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Message-ID: <20160304185923.GC5033@leverpostej>
Date:	Fri, 4 Mar 2016 18:59:24 +0000
From:	Mark Rutland <mark.rutland@....com>
To:	Eric Anholt <eric@...olt.net>
Cc:	linux-rpi-kernel@...ts.infradead.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Stephen Warren <swarren@...dotorg.org>,
	Lee Jones <lee@...nel.org>,
	Florian Fainelli <f.fainelli@...il.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>, devicetree@...r.kernel.org
Subject: Re: [PATCH 2/2] ARM: bcm2835: Add devicetree for the Raspberry Pi 3.

On Fri, Mar 04, 2016 at 10:55:03AM -0800, Eric Anholt wrote:
> Mark Rutland <mark.rutland@....com> writes:
> 
> > On Fri, Mar 04, 2016 at 10:39:29AM -0800, Eric Anholt wrote:
> >> For now this doesn't support the new hardware present on the Pi 3 (BT,
> >> wifi, GPIO expander).  Since the GPIO expander isn't supported, we
> >> also don't have the LEDs like the other board files do.
> >> 
> >> Signed-off-by: Eric Anholt <eric@...olt.net>
> >> ---
> >>  arch/arm/boot/dts/Makefile            |  3 +-
> >>  arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 22 ++++++++++++
> >>  arch/arm/boot/dts/bcm2837.dtsi        | 68 +++++++++++++++++++++++++++++++++++
> >>  3 files changed, 92 insertions(+), 1 deletion(-)
> >>  create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts
> >>  create mode 100644 arch/arm/boot/dts/bcm2837.dtsi
> >
> >> +	timer {
> >> +		compatible = "arm,armv7-timer";
> >> +		interrupt-parent = <&local_intc>;
> >> +		interrupts = <0>, // PHYS_SECURE_PPI
> >> +			     <1>, // PHYS_NONSECURE_PPI
> >> +			     <3>, // VIRT_PPI
> >> +			     <2>; // HYP_PPI
> >> +		always-on;
> >> +	};
> >
> > Are the CPUs in an always-on power domain? Or is it jsut that the kernel
> > doesn't perform power management of CPUs?
> >
> > The always-on proeprty is only intended for the former.
> 
> The kernel doesn't get to do power management of CPUs.  We only have
> control of power domains through the firmware, and the firmware's
> keeping the CPU domain on.

So there is no way that the CPUs could request for the firmare to place
them in a state where the timer would lose context (but other events
coukd wake them up), even if they don't do that today?

Mark

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