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Message-ID: <20160311090840.GA8486@gmail.com>
Date: Fri, 11 Mar 2016 10:08:40 +0100
From: Ingo Molnar <mingo@...nel.org>
To: Andy Lutomirski <luto@...capital.net>
Cc: Borislav Petkov <bp@...en8.de>,
Andy Shevchenko <andy.shevchenko@...il.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"x86@...nel.org" <x86@...nel.org>,
Fenghua Yu <fenghua.yu@...el.com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
Andrew Morton <akpm@...ux-foundation.org>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Oleg Nesterov <oleg@...hat.com>,
"Yu, Yu-cheng" <yu-cheng.yu@...el.com>
Subject: Re: Got FPU related warning on Intel Quark during boot
* Andy Lutomirski <luto@...capital.net> wrote:
> On Thu, Mar 10, 2016 at 6:59 AM, Borislav Petkov <bp@...en8.de> wrote:
> > On Thu, Mar 10, 2016 at 03:31:43PM +0200, Andy Shevchenko wrote:
> >> Looks like it lacks that one.
> >>
> >> # grep -i fxsr /proc/cpuinfo; echo $?
> >> 1
> >
> > Ok, so looking at where the warning comes from:
> >
> > [ 14.714533] WARNING: CPU: 0 PID: 823 at arch/x86/include/asm/fpu/internal.h:163 fpu__clear+0x8c/0x160
> >
> > static inline void copy_kernel_to_fxregs(struct fxregs_state *fx)
> > {
> > int err;
> >
> > if (config_enabled(CONFIG_X86_32)) {
> > err = check_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
> > ^^^^^^^^^^^^^^^^^
> > } else {
> >
> > ...
> >
> > /* Copying from a kernel buffer to FPU registers should never fail: */
> > WARN_ON_FPU(err);
> >
> >
> > and the stacktrace is pretty clear:
> >
> > flush_thread
> > |-> fpu__clear(&tsk->thread.fpu);
> > |-> we are eager by default here:
> >
> > if (!use_eager_fpu() || !static_cpu_has(X86_FEATURE_FPU)) {
> > /* FPU state will be reallocated lazily at the first use. */
> > fpu__drop(fpu);
> > } else {
> >
> > --> we're in that branch.
> >
> > copy_init_fpstate_to_fpregs();
> > |-> copy_kernel_to_fxregs()
> >
> >
> > I think we should use FRSTOR on quark, i.e., copy_kernel_to_fregs().
> >
> > Does this untested wild guess even work?
> >
> > ---
> > diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
> > index dea8e76d60c6..bbafe5e8a1a6 100644
> > --- a/arch/x86/kernel/fpu/core.c
> > +++ b/arch/x86/kernel/fpu/core.c
> > @@ -474,8 +474,11 @@ static inline void copy_init_fpstate_to_fpregs(void)
> > {
> > if (use_xsave())
> > copy_kernel_to_xregs(&init_fpstate.xsave, -1);
> > - else
> > + else if (static_cpu_has(X86_FEATURE_FXSR))
> > copy_kernel_to_fxregs(&init_fpstate.fxsave);
> > + else
> > + copy_kernel_to_fregs(&init_fpstate.fsave);
> > +
> > }
> >
>
> This looks wrong, too:
>
> /*
> * Once per bootup FPU initialization sequences that will run on most x86 CPUs:
> */
> static void __init fpu__init_system_generic(void)
> {
> /*
> * Set up the legacy init FPU context. (xstate init might overwrite this
> * with a more modern format, if the CPU supports it.)
> */
> fpstate_init_fxstate(&init_fpstate.fxsave); <-- wrong format on pre-FXSR CPUs
Indeed:
static inline void fpstate_init_fxstate(struct fxregs_state *fx)
{
fx->cwd = 0x37f;
fx->mxcsr = MXCSR_DEFAULT;
}
I assumed that the fxstate init is outside the legacy FPU context area, but they
overlap: fx->cwd is the first two bytes, and fx->mxcsr overlaps the middle of the
legacy area.
We do a later fpstate_init_fstate(), which does:
static inline void fpstate_init_fstate(struct fregs_state *fp)
{
fp->cwd = 0xffff037fu;
fp->swd = 0xffff0000u;
fp->twd = 0xffffffffu;
fp->fos = 0xffff0000u;
}
which accidentally overwrites the cwd bit - but AFAICS fx->mxcsw overlaps the
first legacy FPU register?
So yes, this needs to be fixed too.
Thanks,
Ingo
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