linux-kernel - Re: [PATCH] net: mvneta: replace MVNETA_CPU_D_CACHE_LINE_SIZE with L1_CACHE

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Message-Id: <20160331.151547.1889188465826831929.davem@davemloft.net>
Date:	Thu, 31 Mar 2016 15:15:47 -0400 (EDT)
From:	David Miller <davem@...emloft.net>
To:	jszhang@...vell.com
Cc:	thomas.petazzoni@...e-electrons.com, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] net: mvneta: replace MVNETA_CPU_D_CACHE_LINE_SIZE with
 L1_CACHE_BYTES

From: Jisheng Zhang <jszhang@...vell.com>
Date: Wed, 30 Mar 2016 19:55:21 +0800

> The mvneta is also used in some Marvell berlin family SoCs which may
> have 64bytes cacheline size. Replace the MVNETA_CPU_D_CACHE_LINE_SIZE
> usage with L1_CACHE_BYTES.
> 
> And since dma_alloc_coherent() is always cacheline size aligned, so
> remove the align checks.
> 
> Signed-off-by: Jisheng Zhang <jszhang@...vell.com>

Applied.