linux-kernel - Re: [PATCH v6 05/17] memory: omap-gpmc: Implement IRQ domain for NAND IRQs

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Date:	Mon, 11 Apr 2016 09:52:23 -0500
From:	Rob Herring <robh@...nel.org>
To:	Roger Quadros <rogerq@...com>
Cc:	tony@...mide.com, computersforpeace@...il.com,
	boris.brezillon@...e-electrons.com, dwmw2@...radead.org,
	ezequiel@...guardiasur.com.ar, javier@...hile0.org, fcooper@...com,
	nsekhar@...com, linux-mtd@...ts.infradead.org,
	linux-omap@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 05/17] memory: omap-gpmc: Implement IRQ domain for
 NAND IRQs

On Thu, Apr 07, 2016 at 01:08:23PM +0300, Roger Quadros wrote:
> GPMC provides 2 interrupts for NAND use. i.e. fifoevent and termcount.
> Use IRQ domain for this. NAND device tree node can then
> get the necessary interrupts by using gpmc as the interrupt parent.
> 
> Legacy boot uses gpmc_get_client_irq to get the
> NAND interrupts from the GPMC IRQ domain.
> Get rid of custom bitmasks and use IRQ domain for that
> as well.
> 
> Signed-off-by: Roger Quadros <rogerq@...com>
> ---
>  Documentation/devicetree/bindings/bus/ti-gpmc.txt |   8 +

Acked-by: Rob Herring <robh@...nel.org>

>  drivers/memory/omap-gpmc.c                        | 246 ++++++++++++----------
>  include/linux/omap-gpmc.h                         |   5 +-
>  3 files changed, 144 insertions(+), 115 deletions(-)