linux-kernel - [PATCH] mips: pistachio: Determine SoC revision during boot

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Message-ID: <1460989489-30469-1-git-send-email-james.hartley@imgtec.com>
Date:	Mon, 18 Apr 2016 15:24:49 +0100
From:	James Hartley <james.hartley@...tec.com>
To:	Ralf Baechle <ralf@...ux-mips.org>,
	Andrew Bresticker <abrestic@...omium.org>,
	Jonas Gorski <jogo@...nwrt.org>,
	James Hogan <james.hogan@...tec.com>
CC:	<linux-mips@...ux-mips.org>, <linux-kernel@...r.kernel.org>,
	Ionela Voinescu <ionela.voinescu@...tec.com>,
	James Hartley <james.hartley@...tec.com>
Subject: [PATCH] mips: pistachio: Determine SoC revision during boot

Now that there are different revisions of the Pistachio SoC
in circulation, add this information to the boot log to make
it easier for users to determine which hardware they have.

Signed-off-by: James Hartley <james.hartley@...tec.com>
Signed-off-by: Ionela Voinescu <ionela.voinescu@...tec.com>

diff --git a/arch/mips/pistachio/init.c b/arch/mips/pistachio/init.c
index 96ba2cc..48f8755 100644
--- a/arch/mips/pistachio/init.c
+++ b/arch/mips/pistachio/init.c
@@ -2,6 +2,7 @@
  * Pistachio platform setup
  *
  * Copyright (C) 2014 Google, Inc.
+ * Copyright (C) 2016 Imagination Technologies
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -9,6 +10,7 @@
  */
 
 #include <linux/init.h>
+#include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/of_address.h>
 #include <linux/of_fdt.h>
@@ -24,9 +26,28 @@
 #include <asm/smp-ops.h>
 #include <asm/traps.h>
 
+/*
+ * Core revision register decoding
+ * Bits 23 to 20: Major rev
+ * Bits 15 to 8: Minor rev
+ * Bits 7 to 0: Maintenance rev
+ */
+#define PISTACHIO_CORE_REV_REG	0xB81483D0
+#define PISTACHIO_CORE_REV_A1	0x00100006
+#define PISTACHIO_CORE_REV_B0	0x00100106
+
 const char *get_system_type(void)
 {
-	return "IMG Pistachio SoC";
+	u32 core_rev;
+
+	core_rev = __raw_readl((const void *)PISTACHIO_CORE_REV_REG);
+
+	if (core_rev == PISTACHIO_CORE_REV_B0)
+		return "IMG Pistachio SoC (B0)";
+	else if (core_rev == PISTACHIO_CORE_REV_A1)
+		return "IMG_Pistachio SoC (A1)";
+	else
+		return "IMG_Pistachio SoC";
 }
 
 static void __init plat_setup_iocoherency(void)
@@ -109,6 +130,8 @@ void __init prom_init(void)
 	mips_cm_probe();
 	mips_cpc_probe();
 	register_cps_smp_ops();
+
+	pr_info("SoC Type: %s\n", get_system_type());
 }
 
 void __init prom_free_prom_memory(void)
-- 
2.5.0