linux-kernel - Re: [PATCH] mips: pistachio: Determine SoC revision during boot

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Message-ID: <57151260.1060300@cogentembedded.com>
Date:	Mon, 18 Apr 2016 19:59:12 +0300
From:	Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:	James Hartley <james.hartley@...tec.com>,
	Ralf Baechle <ralf@...ux-mips.org>,
	Andrew Bresticker <abrestic@...omium.org>,
	Jonas Gorski <jogo@...nwrt.org>,
	James Hogan <james.hogan@...tec.com>
Cc:	linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org,
	Ionela Voinescu <ionela.voinescu@...tec.com>
Subject: Re: [PATCH] mips: pistachio: Determine SoC revision during boot

Hello.

On 04/18/2016 05:24 PM, James Hartley wrote:

> Now that there are different revisions of the Pistachio SoC
> in circulation, add this information to the boot log to make
> it easier for users to determine which hardware they have.
>
> Signed-off-by: James Hartley <james.hartley@...tec.com>
> Signed-off-by: Ionela Voinescu <ionela.voinescu@...tec.com>
>
> diff --git a/arch/mips/pistachio/init.c b/arch/mips/pistachio/init.c
> index 96ba2cc..48f8755 100644
> --- a/arch/mips/pistachio/init.c
> +++ b/arch/mips/pistachio/init.c
[...]
> @@ -24,9 +26,28 @@
>   #include <asm/smp-ops.h>
>   #include <asm/traps.h>
>
> +/*
> + * Core revision register decoding
> + * Bits 23 to 20: Major rev
> + * Bits 15 to 8: Minor rev
> + * Bits 7 to 0: Maintenance rev
> + */
> +#define PISTACHIO_CORE_REV_REG	0xB81483D0
> +#define PISTACHIO_CORE_REV_A1	0x00100006
> +#define PISTACHIO_CORE_REV_B0	0x00100106
> +
>   const char *get_system_type(void)
>   {
> -	return "IMG Pistachio SoC";
> +	u32 core_rev;
> +
> +	core_rev = __raw_readl((const void *)PISTACHIO_CORE_REV_REG);
> +
> +	if (core_rev == PISTACHIO_CORE_REV_B0)
> +		return "IMG Pistachio SoC (B0)";
> +	else if (core_rev == PISTACHIO_CORE_REV_A1)
> +		return "IMG_Pistachio SoC (A1)";
> +	else
> +		return "IMG_Pistachio SoC";

    How about the *switch* instead?

[...]

MBR, Sergei