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Message-ID: <20160420135945.GY3448@twins.programming.kicks-ass.net>
Date:	Wed, 20 Apr 2016 15:59:45 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Cc:	tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
	rjw@...ysocki.net, x86@...nel.org, bp@...en8.de,
	linux-kernel@...r.kernel.org, jacob.jun.pan@...ux.intel.com,
	linux-pm@...r.kernel.org
Subject: Re: [PATCH v4 0/2] Skylake PSys support

On Sun, Apr 17, 2016 at 03:02:59PM -0700, Srinivas Pandruvada wrote:
> Skylake processor supports a new set of RAPL registers for controlling
> entire SoC instead of just CPU package called PSys. This change adds
> support in two sub systems:
> 
> x86/perf: Adds basic support for Skylake RAPL and PSys support
> 
> powercap/rapl: A new platform domain to the current power capping Intel
> RAPL driver.

> Srinivas Pandruvada (2):
>   perf/x86/intel/rapl: support Skylake RAPL domains
>   powercap: intel_rapl: PSys support
> 
>  arch/x86/events/intel/rapl.c     | 51 +++++++++++++++++++++++++++--
>  arch/x86/include/asm/msr-index.h |  2 ++
>  drivers/powercap/intel_rapl.c    | 69 ++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 120 insertions(+), 2 deletions(-)

These two patches depend on one another, right? Because the first patch
adds the MSR the second patch uses?

How should we go about merging this? The perf-rapl stuff normally goes
through tip while the powercap stuff goes through Rafael's tree.

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