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Message-ID: <5719A9E3.1000902@gmail.com>
Date:	Fri, 22 Apr 2016 07:34:43 +0300
From:	Ivaylo Dimitrov <ivo.g.dimitrov.75@...il.com>
To:	tony@...mide.com, bcousson@...libre.com
Cc:	robh+dt@...nel.org, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	linux@....linux.org.uk, linux-omap@...r.kernel.org,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, Sebastian Reichel <sre@...nel.org>
Subject: Re: [PATCH] ARM: dts: omap3: Fix ISP syscon register offset



On 16.04.2016 09:20, Ivaylo Dimitrov wrote:
> According to the TRM, SCM CONTROL_CSIRXFE register is on offset 0x6c
>
> Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@...il.com>
> ---
>   arch/arm/boot/dts/omap34xx.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
> index 5cdba1f..e446562 100644
> --- a/arch/arm/boot/dts/omap34xx.dtsi
> +++ b/arch/arm/boot/dts/omap34xx.dtsi
> @@ -46,7 +46,7 @@
>   			       0x480bd800 0x017c>;
>   			interrupts = <24>;
>   			iommus = <&mmu_isp>;
> -			syscon = <&scm_conf 0xdc>;
> +			syscon = <&scm_conf 0x6c>;
>   			ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>;
>   			#clock-cells = <1>;
>   			ports {
>

Anyone going to review that?

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