linux-kernel - Re: [PATCH 0/6] Intel Secure Guard Extensions

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Message-ID: <CALCETrVVjkppY=pG3CtLWcnP0WMGWJdKVH6CnKxw56gqn0D_1g@mail.gmail.com>
Date:	Tue, 26 Apr 2016 12:05:48 -0700
From:	Andy Lutomirski <luto@...capital.net>
To:	Pavel Machek <pavel@....cz>
Cc:	Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>,
	Greg KH <gregkh@...uxfoundation.org>,
	Andy Lutomirski <luto@...nel.org>,
	Borislav Petkov <bp@...e.de>,
	Boris Ostrovsky <boris.ostrovsky@...cle.com>,
	"open list:STAGING SUBSYSTEM" <devel@...verdev.osuosl.org>,
	Ingo Molnar <mingo@...nel.org>,
	Kristen Carlson Accardi <kristen@...ux.intel.com>,
	"open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
	open list <linux-kernel@...r.kernel.org>,
	Mathias Krause <minipli@...glemail.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Wan Zongshun <Vincent.Wan@....com>
Subject: Re: [PATCH 0/6] Intel Secure Guard Extensions

On Tue, Apr 26, 2016 at 12:00 PM, Pavel Machek <pavel@....cz> wrote:
> On Mon 2016-04-25 20:34:07, Jarkko Sakkinen wrote:
>> Intel(R) SGX is a set of CPU instructions that can be used by
>> applications to set aside private regions of code and data.  The code
>> outside the enclave is disallowed to access the memory inside the
>> enclave by the CPU access control.
>>
>> The firmware uses PRMRR registers to reserve an area of physical memory
>> called Enclave Page Cache (EPC). There is a hardware unit in the
>> processor called Memory Encryption Engine. The MEE encrypts and decrypts
>> the EPC pages as they enter and leave the processor package.
>
> What are non-evil use cases for this?

Storing your ssh private key encrypted such that even someone who
completely compromises your system can't get the actual private key
out.  Using this in conjunction with an RPMB device to make it Rather
Difficult (tm) for third parties to decrypt your disk even if you
password has low entropy.  There are plenty more.

Think of this as the first time that a secure enclave will be widely
available that anyone can program themselves.  Well, almost: Skylake
doesn't actually permit that for, ahem, reasons.  But if you read the
very most recent SDM update, it would appear that future Intel CPUs
will allow this as long as the firmware doesn't get in the way.  Look
for IA32_SGXLEHASHSIG (possibly misspelled slightly -- the first few
letters are correct).

--Andy