linux-kernel - [tip:locking/core] locking/Documentation: Clarify that ACQUIRE applies to loads, RELEASE applies to stores

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Message-ID: <tip-3cfe2e8bc1cf74d78df6fe5ca3a1e1805472a004@git.kernel.org>
Date:	Thu, 28 Apr 2016 03:28:46 -0700
From:	tip-bot for Will Deacon <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	hpa@...or.com, tglx@...utronix.de, mingo@...nel.org,
	will.deacon@....com, paulmck@...ux.vnet.ibm.com,
	torvalds@...ux-foundation.org, linux-kernel@...r.kernel.org,
	peterz@...radead.org
Subject: [tip:locking/core] locking/Documentation: Clarify that ACQUIRE
 applies to loads, RELEASE applies to stores

Commit-ID:  3cfe2e8bc1cf74d78df6fe5ca3a1e1805472a004
Gitweb:     http://git.kernel.org/tip/3cfe2e8bc1cf74d78df6fe5ca3a1e1805472a004
Author:     Will Deacon <will.deacon@....com>
AuthorDate: Tue, 26 Apr 2016 10:22:07 -0700
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Thu, 28 Apr 2016 10:57:51 +0200

locking/Documentation: Clarify that ACQUIRE applies to loads, RELEASE applies to stores

For compound atomics performing both a load and a store operation, make
it clear that _acquire and _release variants refer only to the load and
store portions of compound atomic. For example, xchg_acquire is an xchg
operation where the load takes on ACQUIRE semantics.

Signed-off-by: Will Deacon <will.deacon@....com>
Signed-off-by: Paul E. McKenney <paulmck@...ux.vnet.ibm.com>
Acked-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: corbet@....net
Cc: dave@...olabs.net
Cc: dhowells@...hat.com
Cc: linux-doc@...r.kernel.org
Link: http://lkml.kernel.org/r/1461691328-5429-3-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 Documentation/memory-barriers.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index 8b11e54..147ae8e 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -498,6 +498,11 @@ And a couple of implicit varieties:
      This means that ACQUIRE acts as a minimal "acquire" operation and
      RELEASE acts as a minimal "release" operation.
 
+A subset of the atomic operations described in atomic_ops.txt have ACQUIRE
+and RELEASE variants in addition to fully-ordered and relaxed (no barrier
+semantics) definitions.  For compound atomics performing both a load and a
+store, ACQUIRE semantics apply only to the load and RELEASE semantics apply
+only to the store portion of the operation.
 
 Memory barriers are only required where there's a possibility of interaction
 between two CPUs or between a CPU and a device.  If it can be guaranteed that