linux-kernel - [PATCH] x86, tsc: Fix tsc ratio calibration to avoid broken mdelay

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Message-Id: <1462505619-5516-1-git-send-email-yu.c.chen@intel.com>
Date:	Fri,  6 May 2016 11:33:39 +0800
From:	yu.c.chen@...el.com
To:	x86@...nel.org
Cc:	linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>, Bin Gao <bin.gao@...el.com>,
	Len Brown <lenb@...nel.org>,
	"Rafael J. Wysocki" <rafael@...nel.org>,
	Chen Yu <yu.c.chen@...el.com>,
	"3 . 14+ # 3 . 14+" <stable@...r.kernel.org>
Subject: [PATCH] x86, tsc: Fix tsc ratio calibration to avoid broken mdelay

From: Chen Yu <yu.c.chen@...el.com>

Currently we fetch the tsc radio by:
ratio = (lo >> 8) & 0x1f;
thus get bit8~bit12 of the MSR_PLATFORM_INFO, however according
to Intel 64 and IA-32 Architectures Software Developer Manual 35.5,
the ratio bit should be bit8~bit15, otherwise we might get incorrect
tsc ratio and cause system hang later(mdelay corrupted).

Fix this problem by masking 0xff instead.

Cc: 3.14+ <stable@...r.kernel.org> # 3.14+
Signed-off-by: Chen Yu <yu.c.chen@...el.com>
---
 arch/x86/kernel/tsc_msr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index 92ae6ac..6aa0f4d 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -92,7 +92,7 @@ unsigned long try_msr_calibrate_tsc(void)
 
 	if (freq_desc_tables[cpu_index].msr_plat) {
 		rdmsr(MSR_PLATFORM_INFO, lo, hi);
-		ratio = (lo >> 8) & 0x1f;
+		ratio = (lo >> 8) & 0xff;
 	} else {
 		rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
 		ratio = (hi >> 8) & 0x1f;
-- 
2.7.4