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Message-ID: <CACRpkdZ=KsPL1mBS1bLi=jYsv=Vb1QNBi8XPAJW50doPcwBuZg@mail.gmail.com>
Date:	Tue, 10 May 2016 13:50:11 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Patrice CHOTARD <patrice.chotard@...com>
Cc:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>
Subject: Re: [PATCH] pinctrl: stm32: Implement .pin_config_dbg_show()

On Fri, Apr 29, 2016 at 4:25 PM,  <patrice.chotard@...com> wrote:

> From: Patrice Chotard <patrice.chotard@...com>
>
> Signed-off-by: Patrice Chotard <patrice.chotard@...com>

Patch applied! Because this gives good debuggability.

But think about refactorings:

> +static bool stm32_pconf_input_get(struct stm32_gpio_bank *bank,
> +       unsigned int offset)
> +{
> +       unsigned long flags;
> +       u32 val;
> +
> +       clk_enable(bank->clk);
> +       spin_lock_irqsave(&bank->lock, flags);
> +
> +       val = !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset));
> +
> +       spin_unlock_irqrestore(&bank->lock, flags);
> +       clk_disable(bank->clk);
> +
> +       return val;
> +}
> +
> +static bool stm32_pconf_output_get(struct stm32_gpio_bank *bank,
> +       unsigned int offset)
> +{
> +       unsigned long flags;
> +       u32 val;
> +
> +       clk_enable(bank->clk);
> +       spin_lock_irqsave(&bank->lock, flags);
> +       val = !!(readl_relaxed(bank->base + STM32_GPIO_ODR) & BIT(offset));
> +
> +       spin_unlock_irqrestore(&bank->lock, flags);
> +       clk_disable(bank->clk);
> +
> +       return val;
> +}

Don't you think these two look very similar for example.

But that can be fixed later, debuggability is more important.

Yours,
Linus Walleij

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