lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20160517125238.GE14481@linux-mips.org>
Date:	Tue, 17 May 2016 14:52:38 +0200
From:	Ralf Baechle <ralf@...ux-mips.org>
To:	James Hogan <james.hogan@...tec.com>
Cc:	Peter Zijlstra <peterz@...radead.org>,
	Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...nel.org>,
	Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
	linux-mips@...ux-mips.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] MIPS: perf: Fix I6400 event numbers

On Mon, May 16, 2016 at 07:32:35PM +0100, James Hogan wrote:

> Fix perf hardware performance counter event numbers for I6400. This core
> does not follow the performance event numbering scheme of previous MIPS
> cores. All performance counters (both odd and even) are capable of
> counting any of the available events.
> 
> Fixes: 4e88a8621301 ("MIPS: Add cases for CPU_I6400")

Thanks, applied.

  Ralf

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ