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Message-ID: <AM3PR04MB118504BB6430CBEC8AA4886491480@AM3PR04MB1185.eurprd04.prod.outlook.com>
Date:	Tue, 17 May 2016 01:18:52 +0000
From:	Qiang Zhao <qiang.zhao@....com>
To:	Scott Wood <oss@...error.net>
CC:	"robh+dt@...nel.org" <robh+dt@...nel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Xiaobo Xie <xiaobo.xie@....com>,
	Yang-Leo Li <leoyang.li@....com>,
	"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>
Subject: RE: [v5,1/7] QE: Add IC, SI and SIRAM document to device tree
 bindings.

On Tue, May 17, 2016 at 07:22AM, Scott Wood wrote:
> -----Original Message-----
> From: Scott Wood [mailto:oss@...error.net]
> Sent: Tuesday, May 17, 2016 7:22 AM
> To: Qiang Zhao <qiang.zhao@....com>
> Cc: robh+dt@...nel.org; devicetree@...r.kernel.org; linux-
> kernel@...r.kernel.org; Xiaobo Xie <xiaobo.xie@....com>; Yang-Leo Li
> <leoyang.li@....com>; linuxppc-dev@...ts.ozlabs.org
> Subject: Re: [v5,1/7] QE: Add IC, SI and SIRAM document to device tree
> bindings.
> 
> On Wed, Mar 09, 2016 at 09:21:28AM +0800, Zhao Qiang wrote:
> > Add IC, SI and SIRAM document of QE to
> > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> >
> > Signed-off-by: Zhao Qiang <qiang.zhao@....com>
> > Acked-by: Rob Herring <robh@...nel.org>
> > ---
> > changes for v2
> > 	- Add interrupt-controller in Required properties
> > 	- delete address-cells and size-cells for qe-si and qe-siram Changes
> > for v3
> > 	- Add SoC specific caompatible strings to qe-si and qe-siram Changes
> > for v4
> > 	- NA
> > Changes for v5
> > 	- NA
> >
> >  .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt  | 50
> > ++++++++++++++++++++++
> >  1 file changed, 50 insertions(+)
> > +* Serial Interface Block (SI)
> > +
> > +The SI manages the routing of eight TDM lines to the QE block serial
> > +drivers , the MCC and the UCCs, for receive and transmit.
> > +
> > +Required properties:
> > +- compatible : should be "fsl,t1040-qe-si".
> > +- reg : Address range of SI register set.
> 
> Is t1040 the only chip that has or will ever have this?

There also be t1024 and ls1043 supporting si.
I thought to add them when adding their device node.
If you think it is better to add them now, I will modify.

-Zhao Qiang


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