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Message-ID: <20160519123200.GP14481@linux-mips.org>
Date: Thu, 19 May 2016 14:32:01 +0200
From: Ralf Baechle <ralf@...ux-mips.org>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Paul Burton <paul.burton@...tec.com>, linux-mips@...ux-mips.org,
Matt Redfearn <matt.redfearn@...tec.com>,
Guenter Roeck <linux@...ck-us.net>,
Qais Yousef <qais.yousef@...tec.com>,
Sergei Shtylyov <sergei.shtylyov@...entembedded.com>,
linux-kernel@...r.kernel.org, Jason Cooper <jason@...edaemon.net>,
Joe Perches <joe@...ches.com>,
James Hogan <james.hogan@...tec.com>,
Markos Chandras <markos.chandras@...tec.com>,
Marc Zyngier <marc.zyngier@....com>
Subject: Re: [PATCH 0/3] External Interrupt Controller (EIC) fixes
On Thu, May 19, 2016 at 11:21:22AM +0200, Thomas Gleixner wrote:
> On Tue, 17 May 2016, Paul Burton wrote:
>
> > This series fixes a few small issues with support for External Interrupt
> > Controllers (cpu_has_veic), ensuring that it is configured to service
> > all interrupts by default & that when a GIC is present it's enabled when
> > expected.
> >
> > Applies atop v4.6.
> >
> > Paul Burton (3):
> > MIPS: Clear Status IPL field when using EIC
> > MIPS: smp-cps: Clear Status IPL field when using EIC
> > irqchip: mips-gic: Setup EIC mode on each CPU if it's in use
>
> I was not on CC for patch 1/3 and I assume this should go through one
> tree. Ralf, can you pick that up with my acked-by for the irqchip change?
Yes, will do.
Thanks!
Ralf
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