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Message-Id: <1464111662-15336-1-git-send-email-javier@osg.samsung.com> Date: Tue, 24 May 2016 13:41:00 -0400 From: Javier Martinez Canillas <javier@....samsung.com> To: linux-kernel@...r.kernel.org Cc: devicetree@...r.kernel.org, Kukjin Kim <kgene@...nel.org>, Michael Turquette <mturquette@...libre.com>, Krzysztof Kozlowski <k.kozlowski@...sung.com>, Marek Szyprowski <m.szyprowski@...sung.com>, Mauro Carvalho Chehab <mchehab@....samsung.com>, Shuah Khan <shuahkh@....samsung.com>, Stephen Boyd <sboyd@...eaurora.org>, linux-samsung-soc@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, Sylwester Nawrocki <s.nawrocki@...sung.com>, Tomasz Figa <tomasz.figa@...il.com>, linux-clk@...r.kernel.org, Nicolas Dufresne <nicolas.dufresne@...labora.com>, Javier Martinez Canillas <javier@....samsung.com> Subject: [PATCH 0/2] ARM: dts: Fix imprecise external abort error when accessing Exynos MFC Hello, This series fixes an imprecise external abort error when accessing the Exynos MFC registers due the power domain configuration requiring the aclk333 clock to be enabled during a domain switch. There isn't a dependency between the clock and Linux Samsung SoC trees because the CLK_ACLK333 clock ID is already defined so the patches can be picked indepedently by the relevant subsystem maintainers. Best regards, Javier Javier Martinez Canillas (2): clk: exynos5420: Set ID for aclk333 gate clock ARM: dts: Add async-bridge clock to MFC power domain for Exynos5420 arch/arm/boot/dts/exynos5420.dtsi | 5 +++-- drivers/clk/samsung/clk-exynos5420.c | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) -- 2.5.5
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