lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-Id: <1464111662-15336-2-git-send-email-javier@osg.samsung.com> Date: Tue, 24 May 2016 13:41:01 -0400 From: Javier Martinez Canillas <javier@....samsung.com> To: linux-kernel@...r.kernel.org Cc: devicetree@...r.kernel.org, Kukjin Kim <kgene@...nel.org>, Michael Turquette <mturquette@...libre.com>, Krzysztof Kozlowski <k.kozlowski@...sung.com>, Marek Szyprowski <m.szyprowski@...sung.com>, Mauro Carvalho Chehab <mchehab@....samsung.com>, Shuah Khan <shuahkh@....samsung.com>, Stephen Boyd <sboyd@...eaurora.org>, linux-samsung-soc@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, Sylwester Nawrocki <s.nawrocki@...sung.com>, Tomasz Figa <tomasz.figa@...il.com>, linux-clk@...r.kernel.org, Nicolas Dufresne <nicolas.dufresne@...labora.com>, Javier Martinez Canillas <javier@....samsung.com> Subject: [PATCH 1/2] clk: exynos5420: Set ID for aclk333 gate clock The aclk333 clock needs to be ungated during the MFC power domain switch, so set the clock ID to allow the Exynos power domain logic to lookup this clock if is defined in the MFC PD device tree node. Signed-off-by: Javier Martinez Canillas <javier@....samsung.com> --- drivers/clk/samsung/clk-exynos5420.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 92382cef9f90..469bcae5de3a 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -946,7 +946,7 @@ static struct samsung_gate_clock exynos5x_gate_clks[] __initdata = { GATE_BUS_TOP, 13, 0, 0), GATE(0, "aclk166", "mout_user_aclk166", GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0), - GATE(0, "aclk333", "mout_user_aclk333", + GATE(CLK_ACLK333, "aclk333", "mout_user_aclk333", GATE_BUS_TOP, 15, CLK_IGNORE_UNUSED, 0), GATE(0, "aclk400_isp", "mout_user_aclk400_isp", GATE_BUS_TOP, 16, 0, 0), -- 2.5.5
Powered by blists - more mailing lists