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Message-ID: <C246CAC1457055469EF09E3A7AC4E11A4A5B27B7@XAP-PVEXMBX01.xlnx.xilinx.com>
Date:	Mon, 30 May 2016 10:38:47 +0000
From:	Appana Durga Kedareswara Rao <appana.durga.rao@...inx.com>
To:	Shubhrajyoti Datta <shubhrajyoti.datta@...il.com>
CC:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	"Mark Rutland" <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	"Michal Simek" <michals@...inx.com>,
	Soren Brinkmann <sorenb@...inx.com>,
	"vinod.koul@...el.com" <vinod.koul@...el.com>,
	"dan.j.williams@...el.com" <dan.j.williams@...el.com>,
	Moritz Fischer <moritz.fischer@...us.com>,
	Laurent Pinchart <laurent.pinchart@...asonboard.com>,
	"luis@...ethencourt.com" <luis@...ethencourt.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
	Punnaiah Choudary Kalluri <punnaia@...inx.com>
Subject: RE: [PATCH v9 2/2] dmaengine: Add Xilinx zynqmp dma engine driver
 support

Hi Shubhrajyoti,

> > + */
> > +static void zynqmp_dma_update_desc_to_ctrlr(struct zynqmp_dma_chan
> *chan,
> > +                                     struct zynqmp_dma_desc_sw *desc)
> > +{
> > +       dma_addr_t addr;
> > +
> > +       addr = desc->src_p;
> > +       writel(addr, chan->regs + ZYNQMP_DMA_SRC_START_LSB);
> > +       writel(upper_32_bits(addr), chan->regs +
> > + ZYNQMP_DMA_SRC_START_MSB);
> Can we combine the two writes to a 64bit write.
> It may be helpful on 64-bit systems.

Ok will fix this in the next version of the patch...

Thanks,
Kedar.

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