lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [day] [month] [year] [list]
Message-ID: <1464750753.19731.2.camel@ellerman.id.au>
Date:	Wed, 01 Jun 2016 13:12:33 +1000
From:	Michael Ellerman <mpe@...erman.id.au>
To:	Shreyas B Prabhu <shreyas@...ux.vnet.ibm.com>,
	Daniel Lezcano <daniel.lezcano@...aro.org>
Cc:	linuxppc-dev@...ts.ozlabs.org, paulus@...abs.org,
	linux-kernel@...r.kernel.org, mikey@...ling.org,
	ego@...ux.vnet.ibm.com, maddy@...ux.vnet.ibm.com,
	"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
	linux-pm@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
	Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>
Subject: Re: [PATCH v4 09/10] cpuidle/powernv: Add support for POWER ISA v3
 idle states

On Tue, 2016-05-31 at 19:20 +0530, Shreyas B Prabhu wrote:
> On 05/30/2016 07:56 PM, Daniel Lezcano wrote:
> > On 05/24/2016 03:15 PM, Shreyas B. Prabhu wrote:
> > > +        psscr_val = kcalloc(dt_idle_states, sizeof(*psscr_val),
> > > +                    GFP_KERNEL);
> > > +        rc = of_property_read_u64_array(power_mgt,
> > > +            "ibm,cpu-idle-state-psscr", psscr_val, dt_idle_states);
> > 
> > [cc'ed Lorenzo and Rob ]
> > 
> > I don't see the documentation for the binding. Wouldn't make sense to
> > add the value per idle state instead of an index based array ?


The binding *should* be documented here AFAIK:

  https://github.com/open-power/skiboot/blob/master/doc/device-tree/ibm%2Copal/power-mgt.txt

cheers

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ