linux-kernel - Re: [PATCH v5 13/22] ARM: dts: exynos: Enable UART3 on Exynos5410

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Date:	Wed, 1 Jun 2016 12:57:52 -0700
From:	Kevin Hilman <khilman@...nel.org>
To:	Krzysztof Kozlowski <krzk@...nel.org>
Cc:	Kukjin Kim <kgene@...nel.org>,
	Krzysztof Kozlowski <k.kozlowski@...sung.com>,
	Sylwester Nawrocki <s.nawrocki@...sung.com>,
	Tomasz Figa <tomasz.figa@...il.com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...eaurora.org>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	linux-samsung-soc@...r.kernel.org,
	devicetree <devicetree@...r.kernel.org>,
	lkml <linux-kernel@...r.kernel.org>, linux-clk@...r.kernel.org,
	Javier Martinez Canillas <javier@....samsung.com>,
	Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH v5 13/22] ARM: dts: exynos: Enable UART3 on Exynos5410

Hi Krzysztof,

On Sat, May 28, 2016 at 2:54 AM, Krzysztof Kozlowski <krzk@...nel.org> wrote:
> Just like other Exynos5 family SoCs, this one has four UARTs. Configure
> clocks for UART3 and enable it.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org>
> Reviewed-by: Javier Martinez Canillas <javier@....samsung.com>

This patch landed in linux-next[1] and kernelci.org found a boot
regression on the exynos5410-odroidxu[2], where it looks like it's
faulting in clk_prepare().  Bisecting pointed to this patch.  I added
"status = disabled" back into the DTS on top of next-20160601[3] and
verified my odroid-XU to be booting fine again.

Kevin

[1] 594127ada6df ARM: dts: exynos: Enable UART3 on Exynos5410
[2] https://kernelci.org/boot/exynos5410-odroidxu/job/next/kernel/next-20160601/defconfig/multi_v7_defconfig/lab/lab-baylibre-seattle/?_id=574e97c759b5140f4141c8ef
[3] diff --git a/arch/arm/boot/dts/exynos5410.dtsi
b/arch/arm/boot/dts/exynos5410.dtsi
index a937d9bdad90..f4baf1d1e864 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -238,6 +238,7 @@
 };

 &serial_3 {
+       status = "disabled";
        clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
        clock-names = "uart", "clk_uart_baud0";
 };