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Message-ID: <1465424554.17932.14.camel@neuling.org>
Date: Thu, 09 Jun 2016 08:22:34 +1000
From: Michael Neuling <mikey@...ling.org>
To: Shreyas B Prabhu <shreyas@...ux.vnet.ibm.com>, benh@....ibm.com,
mpe@...erman.id.au
Cc: ego@...ux.vnet.ibm.com, maddy@...ux.vnet.ibm.com,
linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH v5 08/11] powerpc/powernv: Add platform support for stop
instruction
On Wed, 2016-06-08 at 22:31 +0530, Shreyas B Prabhu wrote:
> Hi Ben,
>
> Sorry for the delayed response.
>
> On 06/06/2016 03:58 AM, Benjamin Herrenschmidt wrote:
> >
> > On Thu, 2016-06-02 at 07:38 -0500, Shreyas B. Prabhu wrote:
> > >
> > > @@ -61,8 +72,13 @@ save_sprs_to_stack:
> > > * Note all register i.e per-core, per-subcore or per-thread
> > > is saved
> > > * here since any thread in the core might wake up first
> > > */
> > > +BEGIN_FTR_SECTION
> > > + mfspr r3,SPRN_PTCR
> > > + std r3,_PTCR(r1)
> > > +FTR_SECTION_ELSE
> > > mfspr r3,SPRN_SDR1
> > > std r3,_SDR1(r1)
> > > +ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300)
> > This is the only new SPR we care about in P9 ?
> >
> After reviewing ISA again, I've identified LMRR, LMSER and ASDR also
> need to be restored. I've fixed this in v6.
LMRR and LMSER are used the load monitored patch set. There they will get
restored when we context switch back to userspace. It probably doesn't
hurt that much but you don't need to restore them here.
They are not used in the kernel.
It escapes me what ASDR is right now.
Mikey
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