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Message-Id: <57584F60.7010504@linux.vnet.ibm.com>
Date:	Wed, 08 Jun 2016 22:31:20 +0530
From:	Shreyas B Prabhu <shreyas@...ux.vnet.ibm.com>
To:	benh@....ibm.com, mpe@...erman.id.au
CC:	ego@...ux.vnet.ibm.com, mikey@...ling.org,
	maddy@...ux.vnet.ibm.com, linux-kernel@...r.kernel.org,
	linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH v5 08/11] powerpc/powernv: Add platform support for stop
 instruction

Hi Ben,

Sorry for the delayed response.

On 06/06/2016 03:58 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2016-06-02 at 07:38 -0500, Shreyas B. Prabhu wrote:
>> @@ -61,8 +72,13 @@ save_sprs_to_stack:
>>          * Note all register i.e per-core, per-subcore or per-thread is saved
>>          * here since any thread in the core might wake up first
>>          */
>> +BEGIN_FTR_SECTION
>> +       mfspr   r3,SPRN_PTCR
>> +       std     r3,_PTCR(r1)
>> +FTR_SECTION_ELSE
>>         mfspr   r3,SPRN_SDR1
>>         std     r3,_SDR1(r1)
>> +ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300)
> 
> This is the only new SPR we care about in P9 ?
> 
After reviewing ISA again, I've identified LMRR, LMSER and ASDR also
need to be restored. I've fixed this in v6.

Thanks,
Shreyas


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