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Message-ID: <CAGo_u6okpNGkfYno02nCfEsryki5drrhfwnZUj=ycghh62qoTg@mail.gmail.com>
Date:	Fri, 10 Jun 2016 09:18:16 -0500
From:	Nishanth Menon <nm@...com>
To:	Tony Lindgren <tony@...mide.com>
Cc:	lkml <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	linux-omap <linux-omap@...r.kernel.org>
Subject: Re: [PATCH 0/3] ARM: OMAP: DRA7: Update to latest TRM and cleanup

On Fri, Jun 10, 2016 at 4:34 AM, Tony Lindgren <tony@...mide.com> wrote:
> Hi,
>
> * Nishanth Menon <nm@...com> [160524 06:37]:
>> Hi,
>>
>> Here are the final(hopefully) pending patches for DRA7 based on recent
>> TRM updates. Updates include removing retention support on L3init and
>> L4per as per latest SoC updates.
>>
>> Test Log: X15 (no modules): http://pastebin.ubuntu.com/16655027/
>>
>> Latest TRM (rev F): http://www.ti.com/lit/pdf/spruhz6 (public on May 18)
>>
>> Nishanth Menon (3):
>>   ARM: OMAP: DRA7: powerdomain data: Set L3init and L4per to ON
>>   ARM: OMAP: DRA7: powerdomain data: Remove unused pwrsts_logic_ret
>>   ARM: OMAP: DRA7: powerdomain data: Remove unused pwrsts_mem_ret
>>
>>  arch/arm/mach-omap2/powerdomains7xx_data.c | 76 +-----------------------------
>>  1 file changed, 2 insertions(+), 74 deletions(-)
>
> Can these wait until v4.8 merge window, are this needed as fixes to
> avoid hardware problems?

Yes - at least patch #1 is a h/w "limitation" and can result in non
functional SoC after a duration of operation. the patches #2/3 are
code shrinkage to remove unused data.

-- 
---
Regards,
Nishanth Menon

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