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Message-ID: <20160610160621.GA5829@csclub.uwaterloo.ca>
Date: Fri, 10 Jun 2016 12:06:21 -0400
From: "Lennart Sorensen" <lsorense@...lub.uwaterloo.ca>
To: Sebastian Frias <sf84@...oste.net>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <marc.zyngier@....com>,
LKML <linux-kernel@...r.kernel.org>,
Grygorii Strashko <grygorii.strashko@...com>,
Sricharan R <r.sricharan@...com>, Mason <slash.tmp@...e.fr>,
Måns Rullgård <mans@...sr.com>
Subject: Re: Using irq-crossbar.c
On Fri, Jun 10, 2016 at 05:37:30PM +0200, Sebastian Frias wrote:
> We are trying to write a driver for an interrupt controller (actually more of a crossbar) for an ARM-based SoC.
> This IRQ crossbar has 128 inputs and 24 outputs, the outputs are connected directly to the GIC.
> The idea is that the GIC handles everything, and just request a mapping from an IRQ number (0...127, from a device's DT entry) into one of its 24 input lines.
>
> By looking at current code (4.7-rc1) there seems to be a driver (drivers/irqchip/irq-crossbar.c) that provides similar functionality.
> The driver uses hierarchical irq domains (since commit 783d31863fb8 "irqchip: crossbar: Convert dra7 crossbar to stacked domains") which we believe we don't need because the only controller is the GIC.
> However the API used previously, register_routable_domain_ops(), was removed with commit a5561c3e845c "irqchip: gic: Get rid of routable domain".
>
> Trying to use the driver with hierarchical domains (after modifications for our SoC), results on the kernel being blocked at some point:
>
> [ 0.041524] ThumbEE CPU extension supported.
> [ 0.041589] Registering SWP/SWPB emulation handler
> [ 0.052022] Freeing unused kernel memory: 12364K (c029b000 - c0eae000)
> [ 0.074084] random: dbus-uuidgen urandom read with 0 bits of entropy available
>
> We've put logs on the different domain_ops calls (alloc, free, translate) but they are not called, even if the DT is supposed to tell devices to take interrupts from this controller (*).
>
> Do you have suggestions on what APIs should be used, further reading/examples and/or pointers on how debug this (logs to enable, things to look for, etc.)?
Well irq-crossbar.c seems to be very specific to the crossbar in TI chips
which handle lots of inputs and lots of outputs to multiple receivers
(not just the GIC) as far as I have understood it.
Also, unless you modified the IRQCHIP_DECLARE at the end, I see nothing
in your dtb that would match the driver at all.
And even if that did match, is your crossbar at all register compatible
with the TI design?
irq-crossbar might be a good example for how to write such a driver,
but I wouldn't have much hope of it being useful as a generic driver,
never mind the unfortunate name the source file has. I suspect
ti-irq-crossbar.c would have been much more appropriate.
--
Len Soremsem
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