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Message-ID: <20160618163228.GG3017@tetsubishi>
Date: Sat, 18 Jun 2016 18:32:28 +0200
From: Wolfram Sang <wsa@...-dreams.de>
To: Abhishek Sahu <absahu@...eaurora.org>
Cc: Andy Gross <andy.gross@...aro.org>,
Sricharan <sricharan@...eaurora.org>,
Andy Gross <agross@...eaurora.org>,
Archit Taneja <architt@...eaurora.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
ntelkar@...eaurora.org,
Linux Kernel list <linux-kernel@...r.kernel.org>,
linux-i2c@...r.kernel.org, dmaengine@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 1/2] i2c: qup: Cleared the error bits in ISR
> We run the command i2cdetect for address 0x3 to 0x77. The QUP generates
> write error for address 0x3 to 0x7 apart from other bus errors since
> these are reserved addresses. I was getting the crash in non DMA mode
> and BAM hang in DMA mode before putting the fix.
>
> Also we have connected the I2C TPM and run the following script
> overnight for both DMA and Non DMA mode. The script checks for
> all transfer length and we are generating multiple NACK and
> Non NACK error before each valid transfer.
>
> a=1
>
> while [ $a -lt 4096 ]
> do
> echo $a
> i2cdetect -y -a -r 0 0x03 0x77
> tpm-manager get_random $a
> i2cdetect -y -a -r 1 0x03 0x77
> a=`expr $a + 1`
> done
So, what is the outcome of this discussion?
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