lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-id: <20160620054157.GA6498@samsunx.samsung>
Date:	Mon, 20 Jun 2016 14:41:57 +0900
From:	Andi Shyti <andi.shyti@...sung.com>
To:	Tomasz Figa <tomasz.figa@...il.com>
Cc:	Andi Shyti <andi@...zian.org>,
	Chanwoo Choi <cw00.choi@...sung.com>,
	Sylwester Nawrocki <s.nawrocki@...sung.com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Kukjin Kim <kgene@...nel.org>,
	Krzysztof Kozlowski <k.kozlowski@...sung.com>,
	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>, linux-clk@...r.kernel.org,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	Jaehoon Chung <jh80.chung@...sung.com>,
	Andi Shyti <andi.shyti@...sung.com>
Subject: Re: [PATCH] clk: samsung: exynos5433: use clock_ignore_unused flag for
 SPI3 related clocks

Hi Tomasz,

> >> > The SPI 3 bus uses two clocks, a bus clock and an input clock.
> >> > Do not disable the clocks when unused in order to allow access to
> >> > the SPI 3 device.
> >>
> >> If unused, why would access to SPI 3 device needed?
> >
> > because next I will submit a small driver which uses the SPI3.
> > Actually in the exynos5433 boards all the SPI are used but not all
> > the drivers are ported to mainline.
> 
> Then shouldn't the driver request the clocks and enable them? Or I'm
> missing something obvious? :)

the reason is that...

[ from the patch ]

>         GATE(CLK_SCLK_IOCLK_SPI3, "sclk_ioclk_spi3", "ioclk_spi3_clk_in",
> -                       ENABLE_SCLK_PERIC, 20, CLK_SET_RATE_PARENT, 0),
> +                       ENABLE_SCLK_PERIC, 20,
> +                       CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),

... the sclk_ioclk_spi3 is new in exynos5433 and there is no
implementation for enabling/disabling that particular clock...

>         GATE(CLK_SCLK_SPI3, "sclk_spi3", "sclk_spi3_peric", ENABLE_SCLK_PERIC,
> -                       18, CLK_SET_RATE_PARENT, 0),
> +                       18, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),

... while in this case your question makes sense, but it depends
on which clock the device (s3c64xx) is requesting (from the DTS).
In any case, I kept it consistent with the SPI1, which falls in
the same case, as in mainline we don't have any DTS for
exynos5433 (yet!).

Thanks,
Andi

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ