linux-kernel - RE: [PATCH v3 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

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Date:	Tue, 21 Jun 2016 05:03:20 +0000
From:	"Tan, Jui Nee" <jui.nee.tan@...el.com>
To:	Mika Westerberg <mika.westerberg@...ux.intel.com>,
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
CC:	"heikki.krogerus@...ux.intel.com" <heikki.krogerus@...ux.intel.com>,
	"tglx@...utronix.de" <tglx@...utronix.de>,
	"mingo@...hat.com" <mingo@...hat.com>,
	"hpa@...or.com" <hpa@...or.com>, "x86@...nel.org" <x86@...nel.org>,
	"ptyser@...-inc.com" <ptyser@...-inc.com>,
	"lee.jones@...aro.org" <lee.jones@...aro.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Linus Walleij <linus.walleij@...aro.org>,
	"Yong, Jonathan" <jonathan.yong@...el.com>,
	"Yu, Ong Hock" <ong.hock.yu@...el.com>,
	"Voon, Weifeng" <weifeng.voon@...el.com>,
	"Wan Mohamad, Wan Ahmad Zainie" 
	<wan.ahmad.zainie.wan.mohamad@...el.com>
Subject: RE: [PATCH v3 2/3] x86/platform/p2sb: New Primary to Sideband
 bridge support driver for Intel SOC's



> -----Original Message-----
> From: Mika Westerberg [mailto:mika.westerberg@...ux.intel.com]
> Sent: Monday, June 13, 2016 11:59 PM
> To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> Cc: Tan, Jui Nee <jui.nee.tan@...el.com>; heikki.krogerus@...ux.intel.com;
> tglx@...utronix.de; mingo@...hat.com; hpa@...or.com; x86@...nel.org;
> ptyser@...-inc.com; lee.jones@...aro.org; linux-gpio@...r.kernel.org;
> linux-kernel@...r.kernel.org; Yong, Jonathan <jonathan.yong@...el.com>;
> Yu, Ong Hock <ong.hock.yu@...el.com>; Voon, Weifeng
> <weifeng.voon@...el.com>; Wan Mohamad, Wan Ahmad Zainie
> <wan.ahmad.zainie.wan.mohamad@...el.com>
> Subject: Re: [PATCH v3 2/3] x86/platform/p2sb: New Primary to Sideband
> bridge support driver for Intel SOC's
> 
> On Mon, Jun 13, 2016 at 06:19:12PM +0300, Andy Shevchenko wrote:
> > On Mon, 2016-06-13 at 17:25 +0300, Mika Westerberg wrote:
> > > On Mon, Jun 13, 2016 at 04:54:31PM +0300, Andy Shevchenko wrote:
> > > > Would work to me, though still the same question: is it possible
> > > > to avoid building it on even most of Intel platforms, since there,
> > > > I assume, will be not many users of the module?
> > >
> > > Well, even if you make it configurable via Kconfig, I guess distros
> > > will have to enable it in order to support as wide range of CPUs as
> > > possible in a single binary.
> >
> > Good point.
> >
> > Then perhaps the following we can do:
> >  - add a static boolean flag
> >  - add __init function where we check either PCI root bridge ID or CPU
> > ID (I don't know which one is better, I suppose second one, though it
> > will require an update of arch/x86/include/asm/intel-family.h)
> >  - add a check into the function.
> >
> > What do you think?
> 
> Maybe, or make it modular and use MODULE_DEVICE_TABLE(x86cpu, ...) to
> match the corresponding CPUs.
We need CONFIG_X86_INTEL_NON_ACPI Kconfig option to select CONFIG_PINCTRL.
This is to solve kbuidbot complaint about kernel configuration, i.e.
CONFIG_PINCTRL=n. Appreciate if you could advise something on this.