lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <1210ed15-9dbf-ba8c-90fa-a20a9c757446@redhat.com>
Date:	Wed, 22 Jun 2016 10:41:24 +0200
From:	Paolo Bonzini <pbonzini@...hat.com>
To:	Haozhong Zhang <haozhong.zhang@...el.com>, kvm@...r.kernel.org
Cc:	rkrcmar@...hat.com, Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	"H . Peter Anvin" <hpa@...or.com>, x86@...nel.org,
	linux-kernel@...r.kernel.org, Gleb Natapov <gleb@...nel.org>,
	Boris Petkov <bp@...e.de>, Tony Luck <tony.luck@...el.com>,
	Andi Kleen <andi.kleen@...el.com>,
	Ashok Raj <ashok.raj@...el.com>
Subject: Re: [PATCH v3 0/3] Add KVM support for Intel local MCE



On 22/06/2016 08:59, Haozhong Zhang wrote:
> Changes in v3:
>  * Make guest MSR_IA32_FEATURE_CONTROL always available (Paolo
>    Bonzini) and remove the nested vmx check in the 'get' case in patch
>    1 (Borislav Petkov).
>  * Always mark the locked bit of MSR_IA32_FEATURE_CONTROL
>    valid. (Paolo Bonzini)
>  * Remove the now unnecessary macros to set
>    msr_ia32_feature_control_valid_bits. (Paolo Bonzini)
>  * Remove the unnecessary check of MCG_LMCE_P in v2
>    vmx_mcg_ext_ctl_msr_present() and inline the remaining part. (Paolo
>    Bonzini)
> 
> Changes in v2:
>  * v1 Patch 1 becomes v2 Patch 3.
>  * Fix COB chain in Patch 3. (Boris Petkov)
>  * (Patch 1) Move msr_ia32_feature_control from nested_vmx to
>    vcpu_vmx, because it does not depend only on nested after this
>    patch series. (Radim Krčmář)
>  * (Patch 2) Add a valid bitmask for MSR_IA32_FEATURE_CONTROL to allow
>    checking individual bits of MSR_IA32_FEATURE_CONTROL according to
>    enabled features. (Radim Krčmář)
>  * Move the common check in handling MSR_IA32_MCG_EXT_CTL to function
>    vmx_mcg_ext_ctl_msr_present. (Radim Krčmář)
> 
> Changes in v1:
>  * Change macro KVM_MCE_CAP_SUPPORTED to variable kvm_mce_cap_supported.
>  * Include LMCE capability in kvm_mce_cap_supported only on Intel CPU,
>    i.e. LMCE can be enabled only on Intel CPU.
>  * Check if LMCE is enabled in guest MSR_IA32_FEATURE_CONTROL when
>    handling guest access to MSR_IA32_MCG_EXT_CTL.
> 
> This patch series along with the corresponding QEMU patch series (sent
> via another email with title "[PATCH v5 0/4] Add QEMU support for
> Intel local MCE") enables Intel local MCE feature for guest. This KVM
> patch handles guest access to LMCE-related MSR (MSR_IA32_MCG_EXT_CTL
> and MSR_IA32_FEATURE_CONTROL).
> 
> Ashok Raj (1):
>   KVM: VMX: enable guest access to LMCE related MSRs
> 
> Haozhong Zhang (2):
>   KVM: VMX: move msr_ia32_feature_control to vcpu_vmx
>   KVM: VMX: validate individual bits of guest MSR_IA32_FEATURE_CONTROL
> 
>  arch/x86/include/asm/kvm_host.h |  5 +++
>  arch/x86/kvm/vmx.c              | 67 ++++++++++++++++++++++++++++++++++++-----
>  arch/x86/kvm/x86.c              | 15 +++++----
>  3 files changed, 73 insertions(+), 14 deletions(-)
> 

Thanks, these look good and I'm applying them to kvm/queue.

Paolo

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ