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Message-Id: <1466562349-5043-3-git-send-email-bruherrera@gmail.com>
Date: Tue, 21 Jun 2016 23:25:49 -0300
From: Bruno Herrera <bruherrera@...il.com>
To: robh+dt@...nel.org
Cc: pawel.moll@....com, mark.rutland@....com,
ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
linux@...linux.org.uk, mcoquelin.stm32@...il.com,
johnyoun@...opsys.com, gregkh@...uxfoundation.org,
balbi@...nel.org, zhangfei.gao@...aro.org, a.seppala@...il.com,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-usb@...r.kernel.org
Subject: [PATCH 3/3] dt-bindings: Document the STM32 USB OTG DWC2 core binding
Signed-off-by: Bruno Herrera <bruherrera@...il.com>
---
Documentation/devicetree/bindings/usb/dwc2.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
index 20a68bf..79e5370 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -11,6 +11,7 @@ Required properties:
- "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
- "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
- snps,dwc2: A generic DWC2 USB controller with default parameters.
+ - st,stm32-fsotg: The DWC2 USB controller instance in STM32F4 SoCs in FS mode;
- reg : Should contain 1 register range (address and length)
- interrupts : Should contain 1 interrupt
- clocks: clock provider specifier
--
2.7.4 (Apple Git-66)
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