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Message-ID: <20160624154118.GA4598@rob-hp-laptop>
Date:	Fri, 24 Jun 2016 10:41:18 -0500
From:	Rob Herring <robh@...nel.org>
To:	Bruno Herrera <bruherrera@...il.com>
Cc:	pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	linux@...linux.org.uk, mcoquelin.stm32@...il.com,
	johnyoun@...opsys.com, gregkh@...uxfoundation.org,
	balbi@...nel.org, zhangfei.gao@...aro.org, a.seppala@...il.com,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-usb@...r.kernel.org
Subject: Re: [PATCH 3/3] dt-bindings: Document the STM32 USB OTG DWC2 core
 binding

On Tue, Jun 21, 2016 at 11:25:49PM -0300, Bruno Herrera wrote:
> Signed-off-by: Bruno Herrera <bruherrera@...il.com>
> ---
>  Documentation/devicetree/bindings/usb/dwc2.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
> index 20a68bf..79e5370 100644
> --- a/Documentation/devicetree/bindings/usb/dwc2.txt
> +++ b/Documentation/devicetree/bindings/usb/dwc2.txt
> @@ -11,6 +11,7 @@ Required properties:
>    - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
>    - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
>    - snps,dwc2: A generic DWC2 USB controller with default parameters.
> +  - st,stm32-fsotg: The DWC2 USB controller instance in STM32F4 SoCs in FS mode;

This should go above snps,dwc2.

What determines FS mode vs. HS?

>  - reg : Should contain 1 register range (address and length)
>  - interrupts : Should contain 1 interrupt
>  - clocks: clock provider specifier
> -- 
> 2.7.4 (Apple Git-66)
> 

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