linux-kernel - Re: [PATCH v4 2/2] KVM: nVMX: Fix preemption timer bit set in vmcs02 even if L1 doesn't enable it

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:	Sat, 9 Jul 2016 06:57:56 +0800
From:	Wanpeng Li <kernellwp@...il.com>
To:	Paolo Bonzini <pbonzini@...hat.com>
Cc:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	kvm <kvm@...r.kernel.org>, Wanpeng Li <wanpeng.li@...mail.com>,
	Radim Krčmář <rkrcmar@...hat.com>,
	Yunhong Jiang <yunhong.jiang@...el.com>,
	Jan Kiszka <jan.kiszka@...mens.com>,
	Haozhong Zhang <haozhong.zhang@...el.com>
Subject: Re: [PATCH v4 2/2] KVM: nVMX: Fix preemption timer bit set in vmcs02
 even if L1 doesn't enable it

2016-07-08 23:47 GMT+08:00 Paolo Bonzini <pbonzini@...hat.com>:
>
>
> On 08/07/2016 16:08, Wanpeng Li wrote:
>> 2016-07-08 21:58 GMT+08:00 Wanpeng Li <kernellwp@...il.com>:
>>> We can't get preemption timer vmexit which vmcs02 is loaded since
>>> preemtion timer bit in vmcs02 is not set, then how can we get the
>>> incorrect preemption timer vmexit in nested guest which patch 1 fixed?
>>> Because the scenario I mentioned in patch 2 set vmcs02.
>>>
>>> w/o patch1 + w/o enable "L1 TSC deadline timer to trigger while L2 is
>>> running"  => we will get the bug calltrace mentioned in patch1 since
>>> incorrect vmcs02 bit is set due to the bug mentioned in patch 2. So
>>> apply patch2 can fix it.
>>>
>>> However, after enable "L1 TSC deadline timer to trigger while L2 is
>>> running", we should have patch 1 to correctly capture nested vmexit
>>> for preemption timer.
>>>
>>> My setup is L0 and L1 both are latest kvm queue branch w/ Yunhong's
>>> preemption timer enable patches and my previous "fix missed
>>> cancellation of TSC deadline timer" patches. I always enable
>>> preemption timer in L0, but try to enable or disable preemption timer
>>> in L1.
>>
>> Btw, my L1 is a full dynticks guest in order that hrtimer in L1 will
>> be heavily used.
>
> Thanks---I'd be grateful if you tested my patch series.

I will do it and also reconfirm my patch 2 next monday.

Regards,
Wapeng Li