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Message-ID: <053e042b-c523-9c10-51e5-59a5ac164bc5@redhat.com>
Date: Mon, 11 Jul 2016 09:44:49 +0200
From: Paolo Bonzini <pbonzini@...hat.com>
To: Yang Zhang <yang.zhang.wz@...il.com>,
Radim Krčmář <rkrcmar@...hat.com>,
linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Cc: "Lan, Tianyu" <tianyu.lan@...el.com>,
Igor Mammedov <imammedo@...hat.com>,
Jan Kiszka <jan.kiszka@....de>, Peter Xu <peterx@...hat.com>
Subject: Re: [PATCH v2 11/13] KVM: x86: add KVM_CAP_X2APIC_API
On 11/07/2016 08:06, Yang Zhang wrote:
>> Changes to MSI addresses follow the format used by interrupt remapping
>> unit.
>> The upper address word, that used to be 0, contains upper 24 bits of
>> the LAPIC
>> address in its upper 24 bits. Lower 8 bits are reserved as 0.
>> Using the upper address word is not backward-compatible either as we
>> didn't
>> check that userspace zeroed the word. Reserved bits are still not
>> explicitly
>
> Does this means we cannot migrate the VM from KVM_CAP_X2APIC_API enabled
> host to the disable host even VM doesn't have more than 255 VCPUs?
Yes, but that's why KVM_CAP_X2APIC_API is enabled manually. The idea is
that QEMU will not use KVM_CAP_X2APIC_API except on the newest machine type.
If interrupt remapping is on, KVM_CAP_X2APIC_API is needed even with 8
VCPUs, I think. Otherwise KVM will believe that 0xff is "broadcast"
rather than "cluster 0, CPUs 0-7".
Paolo
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