| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <1469111423-16222-1-git-send-email-hch@lst.de> Date: Thu, 21 Jul 2016 16:30:20 +0200 From: Christoph Hellwig <hch@....de> To: linux-pci@...r.kernel.org Cc: agordeev@...hat.com, linux-kernel@...r.kernel.org Subject: resend: pci: automatic interrupt affinity for MSI/MSI-X capable devices V2 This series adds a new set of functions that transparently use the right type of interrupt (MSI-X, MSI, legacy interrupt line) for a PCI device, and if multiple vectors are supported automatically spreads the irq routing to different CPUs. This will allow the block layer (and hopefully other consumers in the future) to use this information for mapping queues to fit the interrupt affinity. For the last patche to work you need to merge the irq/for-block branch of https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip first. There also is a git tree available at: git://git.infradead.org/users/hch/block.git pci-irq-spreading Gitweb: http://git.infradead.org/users/hch/block.git/shortlog/refs/heads/pci-irq-spreading Since the previous post of V2 I've only added the Reviewed-by: tags from Alexander. Changes since V1 - change return values for the minmum vector check - improve the documentation Changes since automatic interrupt affinity for MSI/MSI-X capable devices V3: - add PCI_IRQ_NOLEGACY flag - various error code fixes - reuse the pci_enable_msi(x)_range code instead of duplicating it - don't allocate msix_entry structures for the MSI-X case
Powered by blists - more mailing lists