linux-kernel - [PATCH v3 2/4] arm64: dts: rockchip: add the saradc for rk3399

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Message-Id: <1469629447-544-2-git-send-email-wxt@rock-chips.com>
Date:	Wed, 27 Jul 2016 22:24:05 +0800
From:	Caesar Wang <wxt@...k-chips.com>
To:	jic23@...nel.org, heiko@...ech.de
Cc:	devicetree@...r.kernel.org, linux-iio@...r.kernel.org,
	linux-kernel@...r.kernel.org, dianders@...omium.org,
	linux-rockchip@...ts.infradead.org, robh+dt@...nel.org,
	john@...anate.com, linux@...ck-us.net,
	linux-arm-kernel@...ts.infradead.org,
	Caesar Wang <wxt@...k-chips.com>
Subject: [PATCH v3 2/4] arm64: dts: rockchip: add the saradc for rk3399

This patch adds saradc needed information on rk3399 SoCs.

Signed-off-by: Caesar Wang <wxt@...k-chips.com>
Reviewed-by: Douglas Anderson <dianders@...omium.org>
---

Changes in v3: None
Changes in v2: None

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 4c84229..b81f84b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -299,6 +299,18 @@
 		};
 	};
 
+	saradc: saradc@...00000 {
+		compatible = "rockchip,rk3399-saradc";
+		reg = <0x0 0xff100000 0x0 0x100>;
+		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+		#io-channel-cells = <1>;
+		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+		clock-names = "saradc", "apb_pclk";
+		resets = <&cru SRST_P_SARADC>;
+		reset-names = "saradc-apb";
+		status = "disabled";
+	};
+
 	i2c1: i2c@...10000 {
 		compatible = "rockchip,rk3399-i2c";
 		reg = <0x0 0xff110000 0x0 0x1000>;
-- 
1.9.1