linux-kernel - Re: [PATCH 17/32] x86, intel_cacheinfo: Enable cache id in x86

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Date:	Thu, 28 Jul 2016 00:41:05 -0500
From:	Nilay Vaish <nilayvaish@...il.com>
To:	Fenghua Yu <fenghua.yu@...el.com>
Cc:	Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...e.hu>,
	"H. Peter Anvin" <h.peter.anvin@...el.com>,
	Tony Luck <tony.luck@...el.com>, Tejun Heo <tj@...nel.org>,
	Borislav Petkov <bp@...e.de>,
	Stephane Eranian <eranian@...gle.com>,
	Peter Zijlstra <peterz@...radead.org>,
	Marcelo Tosatti <mtosatti@...hat.com>,
	David Carrillo-Cisneros <davidcc@...gle.com>,
	Ravi V Shankar <ravi.v.shankar@...el.com>,
	Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
	Sai Prakhya <sai.praneeth.prakhya@...el.com>,
	linux-kernel <linux-kernel@...r.kernel.org>, x86 <x86@...nel.org>
Subject: Re: [PATCH 17/32] x86, intel_cacheinfo: Enable cache id in x86

On 12 July 2016 at 20:02, Fenghua Yu <fenghua.yu@...el.com> wrote:
> From: Fenghua Yu <fenghua.yu@...el.com>
>
> Enable cache id in x86. Cache id comes from APIC ID and CPUID4.
>

I think one of these patches on cache ids should refer to some
documentation from Intel on this subject, either in the commit message
or in the comments in some file.  I found one:
https://software.intel.com/sites/default/files/63/1a/Kuo_CpuTopology_rc1.rh1.final.pdf.
You would know better than me which document we should be looking at.

Thanks
Nilay