linux-kernel - Re: [PATCH v16 6/6] ARM: socfpga: fpga bridge driver support

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Message-ID: <alpine.DEB.2.02.1608010907110.2521@linuxheads99>
Date:	Mon, 1 Aug 2016 09:07:34 -0500
From:	atull <atull@...nsource.altera.com>
To:	Trent Piepho <tpiepho@...etacorp.com>
CC:	Andrea Galbusera <gizero@...il.com>,
	Rob Herring <robh+dt@...nel.org>,
	"pantelis.antoniou@...sulko.com" <pantelis.antoniou@...sulko.com>,
	"Moritz Fischer" <moritz.fischer@...us.com>,
	Josh Cartwright <joshc@...com>,
	"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
	"monstr@...str.eu" <monstr@...str.eu>,
	"michal.simek@...inx.com" <michal.simek@...inx.com>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	"Ian Campbell" <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Jonathan Corbet <corbet@....net>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
	"delicious.quinoa@...il.com" <delicious.quinoa@...il.com>,
	"dinguyen@...nsource.altera.com" <dinguyen@...nsource.altera.com>,
	Matthew Gerlach <mgerlach@...era.com>
Subject: Re: [PATCH v16 6/6] ARM: socfpga: fpga bridge driver support

On Thu, 28 Jul 2016, Trent Piepho wrote:

> On Thu, 2016-07-28 at 10:21 -0500, atull wrote:
> > > >
> > > > This isn't going work if more than one bridge is used.  Each bridge has
> > > > its own priv and thus priv->l3_remap_value.  Each bridge's priv will
> > > > have just the bit for it's own remap set.  The 2nd bridge to be enabled
> > > > will turn off the 1st bridge when it re-write the l3 register.
> > > 
> > > I can confirm this is exactly what happens with tag
> > > "rel_socfpga-4.1.22-ltsi_16.06.02_pr" of socfpga-4.1.22-ltsi branch
> > > from altera-opensource/linux-socfpga which includes more or less the
> > > code in this patch. If you have 2 bridges (lw-hps2fpga and hps2fpga)
> > > you end up with only one of them being visible. Easily spot by logging
> > > l3_remap_value being passed to regmap_write()...
> > > 
> > 
> > Anatolij kindly provided a patch for this issue.  I'll push it
> > to my github repo when I can.
> 
> I still think a better solution would be to allow the syscon driver
> manage shared access.  The purpose of syscon is to manage access to a
> shared resource from multiple devices.  And regmap already has the
> ability to cache a write-only register and allow thread safe access to
> modify bits in said register.  The problem is just the pain of trying to
> do anything to syscon DT bindings.  Something like "write-only" in the
> syscon binding that sets a couple values in the regmap_config is all
> that's necessary.
> 
> Might as well not use syscon at all and have the bridge driver map the
> l3regs itself, since it doesn't really use syscon for anything.
> 

I agree.  Just need time to do it.

Alan