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Message-ID: <1471246100-40713-1-git-send-email-yuantian.tang@nxp.com> Date: Mon, 15 Aug 2016 15:28:20 +0800 From: <yuantian.tang@....com> To: <mturquette@...libre.com> CC: <linux-clk@...r.kernel.org>, <linux-kernel@...r.kernel.org>, <scott.wood@....com>, Tang Yuantian <Yuantian.Tang@....com>, Tang Yuantian <yuantian.tang@....com> Subject: [PATCH] clk: qoriq: fix a register offset error From: Tang Yuantian <Yuantian.Tang@....com> The offset of Core Cluster clock control/status register on cluster group V3 version is different from others, and should be plus 0x70000. Signed-off-by: Tang Yuantian <yuantian.tang@....com> --- drivers/clk/clk-qoriq.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index f4c455a..05e416c 100644 --- a/drivers/clk/clk-qoriq.c +++ b/drivers/clk/clk-qoriq.c @@ -774,7 +774,11 @@ static struct clk * __init create_one_cmux(struct clockgen *cg, int idx) if (!hwc) return NULL; - hwc->reg = cg->regs + 0x20 * idx; + if (cg->info.flags & CG_VER3) + hwc->reg = cg->regs + 0x70000 + 0x20 * idx; + else + hwc->reg = cg->regs + 0x20 * idx; + hwc->info = cg->info.cmux_groups[cg->info.cmux_to_group[idx]]; /* -- 2.1.0.27.g96db324
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