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Date:	Mon, 15 Aug 2016 11:32:02 -0500
From:	Scott Wood <oss@...error.net>
To:	yuantian.tang@....com, mturquette@...libre.com
Cc:	linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
	scott.wood@....com
Subject: Re: [PATCH] clk: qoriq: fix a register offset error

On Mon, 2016-08-15 at 15:28 +0800, yuantian.tang@....com wrote:
> From: Tang Yuantian <Yuantian.Tang@....com>
> 
> The offset of Core Cluster clock control/status register
> on cluster group V3 version is different from others, and
> should be plus 0x70000.
> 
> Signed-off-by: Tang Yuantian <yuantian.tang@....com>
> ---
>  drivers/clk/clk-qoriq.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
> index f4c455a..05e416c 100644
> --- a/drivers/clk/clk-qoriq.c
> +++ b/drivers/clk/clk-qoriq.c
> @@ -774,7 +774,11 @@ static struct clk * __init create_one_cmux(struct
> clockgen *cg, int idx)
>  	if (!hwc)
>  		return NULL;
>  
> -	hwc->reg = cg->regs + 0x20 * idx;
> +	if (cg->info.flags & CG_VER3)
> +		hwc->reg = cg->regs + 0x70000 + 0x20 * idx;
> +	else
> +		hwc->reg = cg->regs + 0x20 * idx;
> +
>  	hwc->info = cg->info.cmux_groups[cg->info.cmux_to_group[idx]];

Reviewed-by: Scott Wood <oss@...error.net>

-Scott

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