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Message-Id: <1472192551-16754-1-git-send-email-zhengxing@rock-chips.com>
Date: Fri, 26 Aug 2016 14:22:30 +0800
From: Xing Zheng <zhengxing@...k-chips.com>
To: linux-rockchip@...ts.infradead.org
Cc: dianders@...omium.org, jay.xu@...k-chips.com,
huangtao@...k-chips.com, Xing Zheng <zhengxing@...k-chips.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Heiko Stuebner <heiko@...ech.de>,
Caesar Wang <wxt@...k-chips.com>,
Brian Norris <briannorris@...omium.org>,
Elaine Zhang <zhangqing@...k-chips.com>,
David Wu <david.wu@...k-chips.com>,
Masahiro Yamada <yamada.masahiro@...ionext.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] arm64: dts: rockchip: fix the address map for WDT0 and WDT1
Dues to incorrect description in the TRM, the WDTs base address
should be fixed and swap them like this:
WDT0 - 0xff848000
WDT1 - 0xff840000
And, it is right that only WDT0 can generate global software reset.
We will update the TRM to fix it.
Signed-off-by: Xing Zheng <zhengxing@...k-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index bc86e8c..f0f52c1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1002,9 +1002,9 @@
};
};
- watchdog@...40000 {
+ watchdog@...48000 {
compatible = "snps,dw-wdt";
- reg = <0x0 0xff840000 0x0 0x100>;
+ reg = <0x0 0xff848000 0x0 0x100>;
clocks = <&cru PCLK_WDT>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
};
--
1.9.1
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