linux-kernel - [PATCH v2 12/15] Rename ROCKCHIP_PCIE_RPIFR1_INTR_MASK and ROCKCHIP_PCIE_RPIFR1_INTR

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 02 Sep 2016 10:55:35 -0500
From:   Bjorn Helgaas <bhelgaas@...gle.com>
To:     Shawn Lin <shawn.lin@...k-chips.com>
Cc:     devicetree@...r.kernel.org, Wenrui Li <wenrui.li@...k-chips.com>,
        Heiko Stuebner <heiko@...ech.de>,
        Arnd Bergmann <arnd@...db.de>,
        Marc Zyngier <marc.zyngier@....com>, linux-pci@...r.kernel.org,
        Brian Norris <briannorris@...omium.org>,
        linux-kernel@...r.kernel.org,
        Doug Anderson <dianders@...omium.org>,
        linux-rockchip@...ts.infradead.org,
        Rob Herring <robh+dt@...nel.org>,
        Guenter Roeck <linux@...ck-us.net>
Subject: [PATCH v2 12/15] Rename ROCKCHIP_PCIE_RPIFR1_INTR_MASK and
 ROCKCHIP_PCIE_RPIFR1_INTR_SHIFT

to match similar definitions.
---
 drivers/pci/host/pcie-rockchip.c |    7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 88c16da..2a41439 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -56,8 +56,8 @@
 #define  PCIE_CLIENT_LINK_STATUS_MASK		0x3
 #define PCIE_CLIENT_INT_MASK		(PCIE_CLIENT_BASE + 0x4c)
 #define PCIE_CLIENT_INT_STATUS		(PCIE_CLIENT_BASE + 0x50)
-#define  ROCKCHIP_PCIE_RPIFR1_INTR_MASK		GENMASK(8, 5)
-#define  ROCKCHIP_PCIE_RPIFR1_INTR_SHIFT	5
+#define  PCIE_CLIENT_INTR_MASK			GENMASK(8, 5)
+#define  PCIE_CLIENT_INTR_SHIFT			5
 #define  PCIE_CLIENT_INT_LEGACY_DONE		BIT(15)
 #define  PCIE_CLIENT_INT_MSG			BIT(14)
 #define  PCIE_CLIENT_INT_HOT_RST		BIT(13)
@@ -679,8 +679,7 @@ static void rockchip_pcie_legacy_int_handler(struct irq_desc *desc)
 	chained_irq_enter(chip, desc);
 
 	reg = rockchip_pcie_read(rockchip, PCIE_CLIENT_INT_STATUS);
-	reg = (reg & ROCKCHIP_PCIE_RPIFR1_INTR_MASK) >>
-	       ROCKCHIP_PCIE_RPIFR1_INTR_SHIFT;
+	reg = (reg & PCIE_CLIENT_INTR_MASK) >> PCIE_CLIENT_INTR_SHIFT;
 
 	while (reg) {
 		hwirq = ffs(reg) - 1;