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Date:   Fri, 02 Sep 2016 10:55:27 -0500
From:   Bjorn Helgaas <bhelgaas@...gle.com>
To:     Shawn Lin <shawn.lin@...k-chips.com>
Cc:     devicetree@...r.kernel.org, Wenrui Li <wenrui.li@...k-chips.com>,
        Heiko Stuebner <heiko@...ech.de>,
        Arnd Bergmann <arnd@...db.de>,
        Marc Zyngier <marc.zyngier@....com>, linux-pci@...r.kernel.org,
        Brian Norris <briannorris@...omium.org>,
        linux-kernel@...r.kernel.org,
        Doug Anderson <dianders@...omium.org>,
        linux-rockchip@...ts.infradead.org,
        Rob Herring <robh+dt@...nel.org>,
        Guenter Roeck <linux@...ck-us.net>
Subject: [PATCH v2 11/15] Rename PCIE_CORE_RC_CONF_SCC_SHIFT to match
 similar definitions.


---
 drivers/pci/host/pcie-rockchip.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index fe1b52f..88c16da 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -121,7 +121,7 @@
 
 #define PCIE_RC_CONFIG_BASE		0xa00000
 #define PCIE_RC_CONFIG_RID_CCR		(PCIE_RC_CONFIG_BASE + 0x08)
-#define  PCIE_CORE_RC_CONF_SCC_SHIFT		16
+#define  PCIE_RC_CONFIG_SCC_SHIFT		16
 #define PCIE_RC_CONFIG_LCS		(PCIE_RC_CONFIG_BASE + 0xd0)
 #define  PCIE_RC_CONFIG_LCS_RETRAIN_LINK	BIT(5)
 #define  PCIE_RC_CONFIG_LCS_LBMIE		BIT(10)
@@ -545,7 +545,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 	rockchip_pcie_write(rockchip, ROCKCHIP_VENDOR_ID,
 			    PCIE_RC_CONFIG_BASE);
 	rockchip_pcie_write(rockchip,
-			    PCI_CLASS_BRIDGE_PCI << PCIE_CORE_RC_CONF_SCC_SHIFT,
+			    PCI_CLASS_BRIDGE_PCI << PCIE_RC_CONFIG_SCC_SHIFT,
 			    PCIE_RC_CONFIG_RID_CCR);
 	rockchip_pcie_write(rockchip, 0x0, PCIE_RC_BAR_CONF);
 

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