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Message-ID: <CALCETrWeFQpUhCn7y45EU9h32QVfaxGS5yP7hfW70zfU2UmWMA@mail.gmail.com>
Date: Wed, 14 Sep 2016 18:17:51 -0700
From: Andy Lutomirski <luto@...capital.net>
To: Kyle Huey <me@...ehuey.com>
Cc: Dave Hansen <dave.hansen@...ux.intel.com>,
"Robert O'Callahan" <robert@...llahan.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
David Vrabel <david.vrabel@...rix.com>,
Juergen Gross <jgross@...e.com>, Borislav Petkov <bp@...e.de>,
Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Huang Rui <ray.huang@....com>,
"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Len Brown <len.brown@...el.com>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
Aravind Gopalakrishnan <aravind.gopalakrishnan@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Vladimir Zapolskiy <vladimir_zapolskiy@...tor.com>,
Kristen Carlson Accardi <kristen@...ux.intel.com>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@...r.kernel.org>,
"moderated list:XEN HYPERVISOR INTERFACE"
<xen-devel@...ts.xenproject.org>
Subject: Re: [PATCH v2 2/3] x86 Test and expose CPUID faulting capabilities in /proc/cpuinfo
On Wed, Sep 14, 2016 at 3:03 PM, Kyle Huey <me@...ehuey.com> wrote:
> On Wed, Sep 14, 2016 at 2:35 PM, Dave Hansen
> <dave.hansen@...ux.intel.com> wrote:
>> On 09/14/2016 02:01 PM, Kyle Huey wrote:
>> Is any of this useful to optimize away at compile-time? We have config
>> options for when we're running as a guest, and this seems like a feature
>> that isn't available when running on bare metal.
>
> On the contrary, this is only available when we're on bare metal.
> Neither Xen nor KVM virtualize CPUID faulting (although KVM correctly
> suppresses MSR_PLATFORM_INFO's report of support for it).
KVM could easily support this. If rr starts using it, I think KVM
*should* add support, possibly even for older CPUs that don't support
the feature in hardware.
It's too bad that x86 doesn't give us the instruction bytes on a
fault. Otherwise we could lazily switch this feature.
--Andy
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