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Message-ID: <20160916150849.4a3ca0bb@bbrezillon>
Date: Fri, 16 Sep 2016 15:08:49 +0200
From: Boris Brezillon <boris.brezillon@...e-electrons.com>
To: David Woodhouse <dwmw2@...radead.org>,
Brian Norris <computersforpeace@...il.com>,
linux-mtd@...ts.infradead.org,
Boris Brezillon <boris.brezillon@...e-electrons.com>,
Richard Weinberger <richard@....at>
Cc: Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [RESEND PATCH 0/3] mtd: nand: standardize ECC maximization
On Wed, 8 Jun 2016 17:04:21 +0200
Boris Brezillon <boris.brezillon@...e-electrons.com> wrote:
> Hello,
>
> Sorry for the noise, but I forgot to add DT maintainers in Cc.
>
> This series aims at standardizing a feature already supported by
> some NAND controller drivers: setting the maximum ECC strength
> based on the OOB area size instead of using the ECC strength/step_size
> information retrieved from the DT or NAND detection code.
>
> This is particularly useful when the NAND device is used in by a
> FS/wear-leveling layer that is not using the OOB area at all (this is
> the case of UBI).
>
> Note that drivers already implementing this kind of logic are not
> converted to the new approach (because of backward compatibility
> concern), but new drivers or drivers that do not already implement
> this 'ECC maximization' logic are encouraged to do it.
Applied.
>
> Regards,
>
> Boris
>
> Boris Brezillon (3):
> mtd: nand: Add an option to maximize the ECC strength
> mtd: nand: Support maximizing ECC when using software BCH
> mtd: nand: sunxi: Support ECC maximization
>
> Documentation/devicetree/bindings/mtd/nand.txt | 9 ++++++++
> drivers/mtd/nand/nand_base.c | 23 ++++++++++++++++++++
> drivers/mtd/nand/sunxi_nand.c | 29 ++++++++++++++++++++++++++
> include/linux/mtd/nand.h | 1 +
> 4 files changed, 62 insertions(+)
>
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