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Message-ID: <alpine.DEB.2.20.1609202214460.5476@nanos>
Date: Tue, 20 Sep 2016 22:16:52 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Alexandre TORGUE <alexandre.torgue@...com>
cc: Maxime Coquelin <mcoquelin.stm32@...il.com>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <marc.zyngier@....com>,
Linus Walleij <linus.walleij@...aro.org>,
Mark Rutland <mark.rutland@....com>,
Rob Herring <robh+dt@...nel.org>, linux-gpio@...r.kernel.org,
arnd@...db.de, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Daniel Thompson <daniel.thompson@...aro.org>,
bruherrera@...il.com, lee.jones@...aro.org
Subject: Re: [PATCH v6 2/4] drivers: irqchip: Add STM32 external interrupts
support
Alexandre,
On Tue, 20 Sep 2016, Alexandre TORGUE wrote:
> The STM32 external interrupt controller consists of edge detectors that
> generate interrupts requests or wake-up events.
>
> Each line can be independently configured as interrupt or wake-up source,
> and triggers either on rising, falling or both edges. Each line can also
> be masked independently.
>
> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@...il.com>
> Signed-off-by: Alexandre TORGUE <alexandre.torgue@...com>
That all looks very reasonable now. The only remaining question is your SOB
chain. Who is the author of these patches? You or Maxime? If it's Maxime,
then the changelog misses a From: tag. If it's you then Maximes SOB is
bogus.
Thanks,
tglx
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