linux-kernel - Re: [PATCH v6 2/4] drivers: irqchip: Add STM32 external interrupts support

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Message-ID: <f7875786-9b5e-075a-59c8-cd32fb1c4583@st.com>
Date:   Wed, 21 Sep 2016 09:45:09 +0200
From:   Alexandre Torgue <alexandre.torgue@...com>
To:     Thomas Gleixner <tglx@...utronix.de>
CC:     Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Jason Cooper <jason@...edaemon.net>,
        Marc Zyngier <marc.zyngier@....com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Mark Rutland <mark.rutland@....com>,
        Rob Herring <robh+dt@...nel.org>, <linux-gpio@...r.kernel.org>,
        <arnd@...db.de>, <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        Daniel Thompson <daniel.thompson@...aro.org>,
        <bruherrera@...il.com>, <lee.jones@...aro.org>
Subject: Re: [PATCH v6 2/4] drivers: irqchip: Add STM32 external interrupts
 support

Hi Thomas,

On 09/20/2016 10:16 PM, Thomas Gleixner wrote:
> Alexandre,
>
> On Tue, 20 Sep 2016, Alexandre TORGUE wrote:
>
>> The STM32 external interrupt controller consists of edge detectors that
>> generate interrupts requests or wake-up events.
>>
>> Each line can be independently configured as interrupt or wake-up source,
>> and triggers either on rising, falling or both edges. Each line can also
>> be masked independently.
>>
>> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@...il.com>
>> Signed-off-by: Alexandre TORGUE <alexandre.torgue@...com>
>
> That all looks very reasonable now. The only remaining question is your SOB
> chain. Who is the author of these patches? You or Maxime? If it's Maxime,
> then the changelog misses a From: tag. If it's you then Maximes SOB is
> bogus.

Actually Maxime wrote the main part of this driver and sent version 1 
and 2 of the series. After Linus W. reviews, rework was required to use 
hierarchical domain. According to Maxime, I coded the rework (adaptation 
to hierarchical domain) and sent other version of the series.

Regards

Alex

>
> Thanks,
>
> 	tglx
>
>