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Message-ID: <20160926155209.GC7509@tuxbot>
Date: Mon, 26 Sep 2016 08:52:09 -0700
From: Bjorn Andersson <bjorn.andersson@...aro.org>
To: Stephen Boyd <stephen.boyd@...aro.org>,
Linus Walleij <linus.walleij@...aro.org>
Cc: John Crispin <john@...ozen.org>, linux-gpio@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] pinctrl: qcom: fix masking of pinmux functions
On Sun 25 Sep 23:36 PDT 2016, Stephen Boyd wrote:
> On Mon, Sep 12, 2016 at 2:36 AM, John Crispin <john@...ozen.org> wrote:
> > The following commit introduced a regression by not properly masking the
> > calculated value.
> >
> > commit 47a01ee9a6c39fe1 ("pinctrl: qcom: Clear all function selection bits")
Please use the format: Fixes: %h (\"%s\")
> >
> > Signed-off-by: John Crispin <john@...ozen.org>
>
> Now I'm confused how it ever worked.... but agreed, the code looks wrong.
I agree, we should have seen some issues based on this, I presume we
where "lucky".
>
> Reviewed-by: Stephen Boyd <stephen.boyd@...aro.org>
>
Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>
@Linus, the corrected patch appeared in v4.8-rc1, would you mind
including this in a pull for v4.8?
Regards,
Bjorn
> > ---
> > drivers/pinctrl/qcom/pinctrl-msm.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
> > index 51c42d7..775c883 100644
> > --- a/drivers/pinctrl/qcom/pinctrl-msm.c
> > +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
> > @@ -156,7 +156,7 @@ static int msm_pinmux_set_mux(struct pinctrl_dev *pctldev,
> > spin_lock_irqsave(&pctrl->lock, flags);
> >
> > val = readl(pctrl->regs + g->ctl_reg);
> > - val &= mask;
> > + val &= ~mask;
> > val |= i << g->mux_bit;
> > writel(val, pctrl->regs + g->ctl_reg);
> >
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